PE9309 Datasheet, PDF (4/6 Pages) Peregrine Semiconductor Corp. – 3.0 - 13.5 GHz Low Power UltraCMOS Divide-by-4 Prescaler

PE9309
Preliminary Specification
Evaluation Kit
The Ceramic SOIC Prescaler Evaluation Board was
designed to help customers evaluate the PE9309
divide-by-4 prescaler. On this board, the device input
(pin 3) is connected to the SMA connector J5 through a
50 Ω transmission line. The device output (pin 6) is
connected to SMA connector J6 through a 50 Ω
transmission line.
Figure 7. Evaluation Board Layouts
Peregrine Specification 101-0392
J4 provides DC power to the device via pin 7. J2
powers U2. Multiple decoupling capacitors
(C4,6,13,16=10pF, C3,5,14,15=0.01uF) are used. One
out of eight different resistors for R_BIAS is selected by
toggling SW1, SW2 and SW3 according to the table
shown in Figure 8. Jumper on J3 should be on to lower
setting (1 and 2). It is the responsibility of the customer
to determine proper supply decoupling for their design
application. The board is constructed using 4 layers.
The top and bottom layers are comprised of Rogers low
loss 4350 material having a core thickness of 0.010";
while the internal layers are comprised of FR-4. The
overall board thickness is 0.062".
Applications Support
If you have a problem with your evaluation kit or if you
have applications questions call [phone] and
ask for applications support. You may also contact us
by fax or e-mail:
Fax: [phone]
E-Mail: [e-mail]
Figure 8. Evaluation Board Schematic
Peregrine Specification 102-0468
VDD 1
VDD2
SW3
0
0
0
0
1
1
1
1
X
SW2 SW1
00
01
10
11
00
01
10
11
XX
Rbias
5.6K
8.2K
12.0K
18.0K
27.0K
39.0K
56.0K
82.0K
Hi Z
J2
HEADER 2
1
2
+
C11
10µF
J4
HEADER 2
+
1
C8
2
10µF
VDD1
VDD1
J3
1
2
3
A0
R8
R9
R10
R1 1
5.6K
8.2K
12.0K
18.0K
U2
ADG708_16LEAD_TSSOP
1 _A0
A1 ¹⁶
2 _EN
A2 ¹⁵
3 _VSS
GND ¹⁴
4 _S1
VDD ¹³
5 _S2
S5 ^{12 R12}
6 _S3
S6 ^{11 R13}
7 _S4
S7 ^{10 R14}
8D
S8 ⁹
R15
A1
A2
27.0K
39.0K
56.0K
82.0K
VDD1
R16
0 OHM
C5
0.01uF
C6
10pF
VDD1
J1
DNI
4
3
2
1
CA1
DN I
2
10
3
9
4
8
5
7
R24
DNI
R25
DNI
R26
DNI
A2
A1
A0
J5
1
VDD1
R22
DNI
C3
0.01uF
C4
10pF
R2
DN I
R3
DNI
C13 10pF
C14 0.01uF
R21
DN I
R18
DN I
U1
Prescaler
1
2
VBYPS RBIAS
VBYPS VDD
8
7
3
4
IN
GND
OUT
NC
6
5
R4
R5
DNI
DNI
VDD1
VDD2
C15
0.01uF
C16
10pF
C7
6.8pF
R6
DNI
R20
0 OHM
J6
1
C9
10pF
C10
0.01uF
VDD2
PCB MOUNTING HOLES
MT1
MT2
MT3
MT4
J7
1
50 OHM
J8
1
NO TES:
1. USE 101-0392-01 PCB
2. CAUTION:
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE
TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD)
3. ALL TRANSMISION LINES ARE:
35MIL WIDTH, 14MIL GAPS, 20MIL CORE DIELECTRIC
3.48 Er AND 2.8MIL Cu THICKNESS.
©2007-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 6
Document No. 70-0241-04 │ UltraCMOS™ RFIC Solutions