PE42421_15 Datasheet, PDF (3/9 Pages) Peregrine Semiconductor Corp. – RF Switch

PE42421
Product Specification
Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
Pin No.
1
2
3
4
5
6
Pin Name
Description
RF1⁴
RF Port1
GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
RF2⁴
RF Port2
CTRL Switch control input, CMOS logic level.
RFC⁴
RF Common
CTRL or V_DD
This pin supports two interface options:
Single-pin control mode. A nominal 3-volt
supply connection is required.
Complementary-pin control mode. A com-
plementary CMOS control signal to CTRL
is supplied to this pin. Bypassing on this
pin is not required in this mode.
Note: 4. All RF pins must be DC blocked with an external series capacitor or
held at 0 VDC
Table 3. Operating Ranges
Parameter
V_DD Power Supply Voltage
I_DD Power Supply Current
(V_DD = 3V, V_CNTL = 3V)
Control Voltage High
Control Voltage Low
Min
1.8
0.7x V_DD
Typ
Max Unit
3.0
3.3
V
9
20
µA
V
0.3x V_DD V
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE42421 in
the SC70 package is MSL1.
Switching Frequency
The PE42421 has a maximum 25 kHz switching rate.
Document No. 70-0396-03 │ www.psemi.com
Table 4. Absolute Maximum Ratings
Symbol
Parameter/Condition
Min Max Unit
V_DD
Power supply voltage
-0.3 4.0
V
V_I
Voltage on any DC input
-0.3
V_DD+
0.3
V
T_ST
T_OP
P_IN
V_ESD
Storage temperature range -65 150
°C
Operating temperature
range
-40
85
°C
Input power (50 Ω)
+34⁵ dBm
ESD Voltage (HBM,
ML_STD 883 Method
3015.7)
2000
V
ESD Voltage (MM, JEDEC,
JESD22-A114-B)
100
V
Notes: 5. To maintain optimum device performance, do not exceed Max PIN at
desired operating frequency (see Figure 4)
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table. Operation
between operating range maximum and absolute
maximum for extended periods may reduce reliability.
Figure 4. Maximum Input Power
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS^®
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS^® device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
specified rating.
©2010-2013 Peregrine Semiconductor Corp. All rights reserved.
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