PE926C32 Datasheet, PDF (2/6 Pages) Peregrine Semiconductor Corp. – Quad RS-422 Differential Line Driver Radiation Hardened

Figure 2. Pin Configuration (Top View)
A- 1
16 V+
A+ 2
15 D-
AQ 3
14 D+
E+ 4 ^PE926C32 13 DQ
BQ 5
12 E-
B+ 6
11 CQ
B- 7
10 C+
V- 8
9 C-
Table 1. Pin Descriptions
Pin
Pin
No. Name
Description
1
A-
Channel A Inverting Input
2
A+ Channel A Noninverting Input
3
AQ Channel A Output
4
E+ Enable, active high
5
BQ Channel B Output
6
B+ Channel B Noninverting Input
7
B-
Channel B Inverting Input
8
V-
Ground Pin
9
C-
Channel C Inverting Input
10
C+ Channel C Noninverting Input
11
CQ Channel C Ouput
12
E-
Enable, active low
13
DQ Channel D Output
14
D+ Channel D Noninverting Input
15
D-
Channel D Inverting Input
16
V+ Supply Pin
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 6
PE926C32
Product Specification
Table 2. Recommended Operating Conditions
Symbol Parameter/Conditions Min Max Units
V+
T_OP
VIN (Line)
VIN (Dig)
VOUT
IOUT
Supply voltage
Operating temperature
range
Maximum input voltage
A+/-, B+/-, C+/-, D+/-
Maximum input voltage
Maximum output voltage
Maximum output current
3.0 3.6
V
-55 125
°C
-7
7
V
0 Vdd
V
0 Vdd
V
-10 10
mA
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 2.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Functional Considerations
The PE926C32 operates at high switching
speeds. In order to obtain maximum
performance, it is crucial that pin 16 be supplied
with a bypass capacitor to ground (pin 8).
Table 3. Truth Table
E+
E-
Vin (Diff)
Q
L
H
X
Z
H
X
<-200 mV
L
X
L
H
X
>+200 mV
H
X
L
H
X
Open
H
X
L
Document No. 70-0158-01 │ UltraCMOS™ RFIC Solutions