PE4283 Datasheet, PDF (2/11 Pages) Peregrine Semiconductor Corp. – SPDT High Power UltraCMOS™ DC - 4.0 GHz RF Switch

Figure 3. Pin Configuration (Top View)
pin 1
RF1 ¹
GND ²
RF2 ³
6 _V2
5 _RFC
4 _V1
Table 2. Pin Descriptions
Pin
Pin
No.
Name
Description
1
RF1
RF Port1²
Ground connection. Traces should be
2
GND
physically short and connected to ground
plane for best performance.
3
RF2
RF Port2²
4
V1
Switch control input, CMOS logic level.
5
RFC
RF Common²
This pin supports two interface options:
Single-pin control mode. A nominal 3-volt
6
V2
supply connection is required.
Complementary-pin control mode. A
complementary CMOS control signal
to V1 is supplied to this pin.
Note: 2. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Table 3. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
V_DD
V_I
T_ST
T_OP
P_IN
V_ESD
Power supply voltage
-0.3 4.0
V
Voltage on any input
Storage temperature
range
Operating temperature
range
-0.3
VDD+
0.3
V
-65 150
°C
-40 85
°C
Input power (50Ω)
+34 dBm
ESD Voltage (HBM,
ML_STD 883 Method
3015.7)
ESD Voltage (MM,
JEDEC, JESD22-A114-B)
1500
V
100
V
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 11
PE4283
Product Specification
Table 4. DC Electrical Specifications
Parameter
Min Typ Max Units
VDD Power Supply Voltage
2.0
3.0
3.3
V
IDD Power Supply Current
(V1 = 3V, V2 = 3V)
8
50
µA
Control Voltage High
0.7x VDD
V
Control Voltage Low
0.3x VDD V
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Figure 4. Maximum Operating Input Power³
Note: 3. Operating within DC limits (Table 4).
Document No. 70-0177-04 │ UltraCMOS™ RFIC Solutions