PE3502 Datasheet, PDF (2/7 Pages) Peregrine Semiconductor Corp. – 3500 MHz Low Power UltraCMOS™ Divide-by-4 Prescaler

Figure 3. Pin Configuration (Top View)
VDD
1
IN 2
DEC 3
GND 4
3502
8 _GND
7 _OUT
6 _GND
5 GND
Table 2. Pin Descriptions
Pin
Pin
No. Name
Description
1
V_DD Power supply pin. Bypassing is required.
2
IN
Input signal pin. Should be coupled with a
capacitor (eg 15 pF)
3
DEC Power supply decoupling pin. Place a ca-
pacitor as close as possible and connect
directly to the ground plane (eg 10 nF and
10 pF).
4
GND Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
5
GND Ground pin.
6
GND Ground pin.
7
OUT Divided frequency output pin. This pin
should be coupled with a capacitor (eg 100
pF).
8
GND Ground pin.
Table 3. Absolute Maximum Ratings
Symbol
V_DD
T_ST
T_OP
V_ESD
P_INMAX
Parameter/Conditions Min Max Units
Supply voltage
4.0
V
Storage temperature
range
Operating temperature
range
ESD voltage (Human
Body Model)
Maximum input power
-65 150 °C
-40 85
°C
250
V
10 dBm
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
PE3502
Product Specification
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Functional Considerations
The PE3502 takes an input signal frequency from
1500 MHz to 3500 MHz and produces an output
signal frequency one-fourth that of the supplied
input. In order for the prescaler to work properly,
several conditions need to be adhered to. It is
crucial that pin 3 be supplied with a bypass
capacitor to ground. In addition, the input and
output signals (pins 2 & 7, respectively) need to
be AC coupled via an external capacitor as shown
in the test circuit in Figure 7.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance.
©2005 Peregrine Semiconductor Corp. All rights reserved.
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Document No. 70-0046-04 │ UltraCMOS™ RFIC Solutions