EPA245-50 Datasheet, PDF (1/1 Pages) PCA ELECTRONICS INC. – SMD 14 Pin 10 Tap TTL Compatible Active Delay Modules

SMD 14 Pin 10 Tap TTL Compatible Active Delay Modules
Tap Delays Total Delays Gull-Wing
±5% or ±2 nS† ±5% or ±2 nS†
Part
Number
J-Lead
Part
Number
Tap Delays Total Delays Gull-Wing
±5% or ±2 nS† ±5% or ±2 nS†
Part
Number
5
50
EPA245-50 EPA247-50
44
440
EPA245-440
6
60
EPA245-60 EPA247-60
45
450
EPA245-450
7.5
75
EPA245-75 EPA247-75
47
470
EPA245-470
10
100
EPA245-100 EPA247-100
50
500
EPA245-500
12.5
125
EPA245-125 EPA247-125
55
550
EPA245-550
15
150
EPA245-150 EPA247-150
60
600
EPA245-600
17.5
175
EPA245-175 EPA247-175
65
650
EPA245-650
20
200
EPA245-200 EPA247-200
70
700
EPA245-700
22.5
225
EPA245-225 EPA247-225
75
750
EPA245-750
25
250
EPA245-250 EPA247-250
80
800
EPA245-800
30
300
EPA245-300 EPA247-300
85
850
EPA245-850
35
350
EPA245-350 EPA247-350
90
900
EPA245-900
40
400
EPA245-400 EPA247-400
95
950
EPA245-950
42
420
EPA245-420 EPA247-420
100
1000
EPA245-1000
†Whichever is greater. Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.
J-Lead
Part
Number
EPA247-440
EPA247-450
EPA247-470
EPA247-500
EPA247-550
EPA247-600
EPA247-650
EPA247-700
EPA247-750
EPA247-800
EPA247-850
EPA247-900
EPA247-950
EPA247-1000
DC Electrical Characteristics
Parameter
Test Conditions
Min Max Unit
VOH
VOL
VIK
IIH
IIL
IOS
ICCH
ICCL
TRO
NH
NL
High-Level Output Voltage
Low-Level Output Voltage
Input Clamp Voltage
High-Level Input Current
Low-Level Input Current
Short Circuit Output Current
High-Level Supply Current
Low-Level Supply Current
Output Rise Time
Fanout High-Level Output
Fanout Low-Level Output
VCC = min. VIL= max. IOH = max 2.7
VCC = min. VIH = min. IOL= max
VCC = min. II = IIK
VCC = max. VIN = 2.7V
VCC = max. VIN = 5.25V
VCC = max. VIN = 0.5V
VCC = max. VOUT = 0.
-40
(One output at a time)
VCC = max. VIN = OPEN
VCC = max. VIN = 0
Td ≤ 500 nS (0.75 to 2.4 Volts)
Td > 500 nS
VCC = max. VOH = 2.7V
VCC = max. VOL = 0.5V
V
0.5 V
-1.2 V
50
µA
1.0 mA
-2
mA
-100 mA
150 mA
150 mA
4
nS
5
nS
20 TTL LOAD
10 TTL LOAD
Schematic
14 VCC
INPUT
OUTPUT
13 3 12 4 11 5 10 6 9 8
1
7
GROUND
Input Pulse Test Conditions @ 25° C
EIN
PW
TRI
PRR
VCC
Pulse Input Voltage
Pulse Width % of Total Delay
Pulse Rise Time (0.75 - 2.4 Volts)
Pulse Repetition Rate @ Td ≤ 200 nS
Pulse Repetition Rate @ Td > 200 nS
Supply Voltage
Unit
3.2 Volts
110 %
2.0 nS
1.0 MHz
100 KHz
5.0 Volts
Gull-Wing Package
.055
.400
Max.
PCA
EPA245-50
Date Code
.280
Suggested Solder
Max.
Pad Layout
.410
.250
Max.
.02
.780 Max.
.100
.100
.01
Typ.
.050
DSA245/7 Rev. A 2/5/96
Unless Otherwise Noted Dimensions in Inches
Tolerances:
Fractional = ± 1/32
.XX = ± .030 .XXX = ± .010
.03
.300
Recommended
Operating Conditions
VCC
VIH
VIL
IIK
IOH
IOL
PW*
d*
TA
Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Current
High-Level Output Current
Low-Level Output Current
Pulse Width of Total Delay
Duty Cycle
Operating Free-Air Temperature
*These two values are inter-dependent.
J-Lead Package
Min
4.75
2.0
40
0
Max
5.25
0.8
-18
-1.0
20
40
+70
Unit
V
V
V
mA
mA
mA
%
%
°C
.055
.300
Max.
.275
Max.
.02
PCA
EPA247-50
Date Code
.780 Max.
.100
.280
Suggested Solder
Max.
Pad Layout
.310
.100
.03
.025
.045
.300
ELECTRONICS INC.
QAF-CSO1 Rev. B 8/25/94
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: [phone]
FAX: [phone]