EPA1140F-25 Datasheet, PDF (1/1 Pages) PCA ELECTRONICS INC. – SMD 8 Pin DIP 5 Tap Fast-TTL Logic Compatible Active Delay Lines

SMD 8 Pin DIP 5 Tap Fast-TTL Logic
Compatible Active Delay Lines
TAP DELAYS
±5% or ±2 nS
5, 10, 15, 20
6, 12, 18, 24
7, 14, 21, 28
8, 16, 24, 32
9, 18, 27, 36
10, 20, 30, 40
12, 24, 36, 48
15, 30, 45, 60
20, 40, 60, 80
25, 50, 75, 100
TOTAL DELAYS
±5% or ±2 nS
25
30
35
40
45
50
60
75
100
125
PART
NUMBER
EPA1140F-25
EPA1140F-30
EPA1140F-35
EPA1140F-40
EPA1140F-45
EPA1140F-50
EPA1140F-60
EPA1140F-75
EPA1140F-100
EPA1140F-125
TAP DELAYS
±5% or ±2 nS
TOTAL DELAYS
±5% or ±2 nS
30, 60, 90, 120
150
35, 70, 105, 140
175
40, 80, 120, 160
200
45, 90, 135, 180
225
50, 100, 150, 200
250
60, 120, 180, 240
300
70, 140, 210, 280
350
80, 160, 240, 320
400
90, 180, 270, 360
450
100, 200, 300, 400
500
Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.
PART
NUMBER
EPA1140F-150
EPA1140F-175
EPA1140F-200
EPA1140F-225
EPA1140F-250
EPA1140F-300
EPA1140F-350
EPA1140F-400
EPA1140F-450
EPA1140F-500
DC Electrical Characteristics
Parameter
Test Conditions
Min Max Unit
VOH
VOL
VIK
IIH
IIL
IOS
High-Level Output Voltage VCC= min. VIL= max. I _OH = max 2.7
Low-Level Output Voltage VCC= min. VIH = min. I _OL= max
Input Clamp Voltage
VCC= min. II = IIK
High-Level Input Current VCC= max. V _IN = 2.7V
VCC= max. V _IN = 5.25V
Low-Level Input Current
VCC= max. V _IN = 0.5V
Short Circuit Output Current VCC= max. V _OUT = 0.
-40
(One output at a time)
ICCH High-Level Supply Current
ICCL Low-Level Supply Current
TRO Output Rise Time
VCC= max. V _IN = OPEN
VCC= max. V _IN = 0
Td ≤ 500 nS (0.75 to 2.4 Volts)
Td > 500 nS
NH Fanout High-Level Output VCC= max. V _OH = 2.7V
NL Fanout Low-Level Output VCC= max. V _OL = 0.5V
V
0.5 V
-1.2 V
50
µA
1.0 mA
-0.6 mA
-150 mA
15
mA
50
mA
3
nS
3
nS
20 TTL LOAD
10 TTL LOAD
Schematic
8
VCC 7 2 6 3 5 OUTPUT
INPUT 1
4 GROUND
Recommended
Operating Conditions
VCC
VIH
VIL
IIK
IOH
IOL
PW*
d*
TA
Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Current
High-Level Output Current
Low-Level Output Current
Pulse Width of Total Delay
Duty Cycle
Operating Free-Air Temperature
*These two values are inter-dependent.
Min Max Unit
4.75 5.25 V
2.0
V
0.8
V
-18 mA
-1.0 mA
20
mA
40
%
40
%
-55
+125 °C
Input Pulse Test Conditions @ 25° C
EIN
PW
TRI
PRR
VCC
Pulse Input Voltage
Pulse Width % of Total Delay
Pulse Rise Time (0.75 - 2.4 Volts)
Pulse Repetition Rate @ Td ≤ 200 nS
Pulse Repetition Rate @ Td > 200 nS
Supply Voltage
EPA1140F 10/92
Unit
3.2 Volts
110 %
2.0 nS
1.0 MHz
100 KHz
5.0 Volts
Package Dimensions
.03
.400
Max.
PCA
EPA1140F-25
D.C.
.280
Max.
.055 _{Pad Layout} .410
.100
.100
.500 Max.
.01
.250
Typ.
Max.
.02
.050
.300
ELECTRONICS
INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: [phone]
FAX: [phone]