PJSOT05CFN3 Datasheet, PDF (1/3 Pages) Pan Jit International Inc. – E.S.D. Dual Protection Diode Array

P J S O T 0 5 C FN 3
E.S.D. Dual Protection Diode Array
This Dual Unidirectional ESD Protector Array family have been designed to protect sensitive equipment against
ESD in high speed transmission buses, operating at 5V. This dual array offers an integrated solution to protect up
to 2 data lines in a unidirectional mode or, 1 data line in a bi-directional mode, in application where the board
space is a premium, in our DFN 3L package version.
FEATURES
• IEC61000-4-2 ESD 15kV air, 8kV Contact Compliance
DFN 3L
0.042(1.05)
0.037(0.95)
Unit : inch(mm)
• Low Leakage Current,Maximum of 0.5A at rated voltage
• Maximum Capacitance of 10pF per device at 0Vdc 1MHz
• Peak Power Dissipation of 20W 8/20s Waveform
• Pin to pin compatible with standard DFN 3L
• In compliance with EU RoHS 2002/95/EC directives
0.002(0.05) MAX.
MECHANICAL DATA
• Case: DFN 3L, Molded Plastic
• Terminals: Solderable per MIL-STD-750, Method 2026
• Marking: AF
2
3
1
0.013(0.32)
0.008(0.22)
0.014(0.36)
0.013(0.32)
0.008(0.22)
MAXIMUM RATINGS (Per Device)
Parameter
Peak Pulse Power (8/20s Waveform)
Peak Pulse Current (8/20s Waveform)
ESD Voltage (HBM Per MIL STD883C-Method 3015-6)
Operating Temperature Range
Storage Temperature Range
Symbol
PPP
I PPM
VESD
TJ
TSTG
Value
20
2
20
-55 to +125
-55 to +150
Units
W
A
kV
o_C
o_C
ELECTRAICAL CHARACTERISTICS (Per Device)TJ=25^oC
Parameter
Reverse Stand-Off Voltage
S ymb o l
V WRM
Te s t C o nd i ti o n
-
M IN .
-
T YP.
-
MAX. Units
5.0
V
Reverse Breakdown Voltage
V BR
I BR=1mA
6.2
-
7.2
V
Reverse Leakage Current
IR
V R=5 V
-
-
0.5
A
Clamping Voltage (8/20 s)
VC
I PP=2A
-
-
10
V
Off State Junction Capacitance
(Note 1)
0Vdc Bias f=1MHz
CJ
between pin 1,2 to 3
-
(Gnd)
9
10
pF
Note : 1.Capacitance between pins 1 and 2 is half of the value, in a bi-directional configuration.
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
REV.0.1-JUL.14.2009
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