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PJSD03LCTM Datasheet, PDF (1/5 Pages) Pan Jit International Inc. – BI-DIRECTIONAL ESD PROTECTION DIODE
PJSD03LCTM
BI-DIRECTIONAL ESD PROTECTION DIODE
This bi-directional TVS has been designed to protect sensitive equipment against ESD and to prevent Latch-Up
events in CMOS circuitry operating at 3.3Vdc and below.This offers an integrated solution to protect a single data
line where the board space is a premium.
SPECIFICATION FEATURES
• 50W Power Dissipation (8/20μs Waveform)
• Low Leakage Current, Maximum of 2.5μA@3.3Vdc
• Very low Clamping voltage
• IEC 61000-4-2 ESD + 15kV air, + 8kV Contact Compliance
•/HDGIUHHLQFRPSO\ZLWK(85R+6(&GLUHFWLYHV
‡*UHHQPROGLQJFRPSRXQGDVSHU,(&6WG +DORJHQ)UHH
• Terminals : Solderable per MIL-STD-750, Method 2026
• Approx. Weight: 0.00002 ounces, 0.0005grams
• Case : SOD-923, Plastic
• Marking : O
0.034(0.85)
0.029(0.75)
0.026(0.65)
0.021(0.55)
0.018(0.45)
0.013(0.35)
APPLICATIONS
• Video I/O ports protection
• Set Top Boxes
• Portable Instrumentation
0.007(0.18)
0.003(0.08)
0.042(1.05)
0.037(0.95)
MAXIMUM RATINGS (TA=25oC unless otherwise noted)
RATING
Peak Pulse Power (8/20 μs Waveform)
Peak Pulse Current (8/20 μs Waveform)
IE C 61000-4-2 C ontact
IE C 61000-4-2 A i r
Op e ra ti ng J unc ti o n a nd S to ra g e Te mp e r a ture Ra ng e
SYMBOL
PPP
I PPM
VESD
VESD
TJ,TSTG
VALUE
50
3
+8
+15
-55 to +150
ELECTRICAL CHARACTERISTICS (TA=25oC unless otherwise noted)
PARAMETER
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20ms)
Off State Junction Capacitance
SYMBOL
CONDITION
VRWM
VBR
I BR=1mA
IR
VR=3.3V
VC
I PP=3A
CJ
0 Vdc Bias f=1MHZ
MIN.
TYP.
MAX.
-
-
3.3
5.4
-
7.0
-
-
2.5
-
14
16.6
-
13
-
November 10,2011-REV.00
UNITS
W
A
kV
kV
OC
UNITS
V
V
μA
V
pF
PAGE . 1