PJLC1V5_06 Datasheet, PDF (1/4 Pages) Pan Jit International Inc. – SINGLE AND DUAL LOW CAPACITANCE ESD / TRANSIENT PROTECTOR FOR 1.5 V SYSTEMS

PJLC1V5, 1V5D
SINGLE AND DUAL LOW CAPACITANCE ESD / TRANSIENT PROTECTOR
FOR 1.5 V SYSTEMS
This patented Single and Dual Zener like ESD/Transient Protector has been designed
to protect Sensitive Equipment against ESD and prevent Latch-Up events, offering a
minimum insertion loss in High speed Data Lines in Communications ports used in
3
Portable Consumer, Computing and Networking Applications operating at 1.5V and
below.
1
SPECIFICATION FEATURES
2
Maximum Capacitance of 10pF @ 0Vdc, 1 MHz
Maximum Leakage Current of 2µA @ 1.5V
Breakdown Voltage of 1.9V @ 1mA
IEC61000-4-2 Compliance 15kV Air, 8kV Contact Discharge
Industry Standard SOT23 Package
APPLICATIONS
High Speed Data Transmission Lines
Microcontroller and Microprocessor I/O Interfaces
Portable Consumer Electronics
Instrumentation Equipment
LAN/WAN Equipment
MAXIMUM RATINGS
2
1
3 (GND)
SOT23
Rating
Peak Pulse Power (8/20µs Waveform)
ESD Voltage (HBM)
Operating Temperature Range
Storage Temperature Range
Lead Soldering Temperature (max 10 s)
ELECTRICAL CHARACTERISTICS Tj = 25°C
Symbol
P _pp
V _ESD
TJ
T_stg
TL
Value
50
>25
-55 to +125
-55 to +150
260
Units
W
kV
°C
°C
°C
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20µs)
Clamping Voltage (8/20µs)
Maximum Peak Pulse Current
Off State Junction Capacitance
Symbol
V_WRM
V_BR
I_R
V_c
V_c
I _pp
Cj
Conditions
Min Typical Max
1.5
I _BR = 100µA
I _BR = 1mA
V_R = 1.5V
I _pp = ^{1 A}
I _pp = 3 A
1.75 1.8
1.9 2.2
2.0
4
7
8/20 µs Waveform
5
0 Vdc Bias f = 1MHz
Between I/O pins and pin 3
6
10
Units
V
V
V
µA
V
V
A
pF
7/21/2006
Page 1
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