PJDLC03 Datasheet, PDF (1/4 Pages) Pan Jit International Inc. – ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE SUPPRESSOR

PJDLC03~PJDLC24
VOLTAGE 3.3 to 24 Volts POWER 400 Watts
ULTRA LOW CAPACITANCE DUAL TRANSIET VOLTAGE
SUPPRESSOR FOR HIGH SPEED DATA LINES
This transient overvoltage suppressor is intended to prodect sensitive equipment
againset electrostatic discharge events as well to offer a minmum lnsertion loss
in data transmission lines in communications ports used in portable consumer,
computing and networking applicatons. This dual transient voltage suppressor comes
in a single SOT-23, offering borard space reduction, where the application requires it.
FEATURES
• Maximum capacitance @ 0 Vdc Bias of 1.2 pF between terminals 1-3
or terminals 2-3
• IEC61000-4-2 esd 15kV Air, 8kV contact compliance
• In compliance with EU RoHS 2002/95/EC directives
MECHANICAL DATA
• Case: SOT-23, plastic
• Terminals: solderable per MIL-STD-750, Method 2026
• Apporx. Weight: 0.0003 ounce, 0.0084 gram
0.120(3.04)
0.110(2.80)
0.056(1.40)
0.047(1.20)
0.079(2.00)
0.070(1.80)
0.004(0.10)MAX.
0.020(0.50)
0.013(0.35)
0.008(0.20)
0.003(0.08)
0.044(1.10)
0.035(0.90)
MAXIMUM RATINGS
Parameter
Operating Junction
S to ra g e Te m p e ra tur e Ra ng e
ELECTRICAL CHARACTERISTICS
PJDLC03 Marking DL3
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage
Clamping Voltage
Junction Capacitance
October 12,2010-REV.00
Symbol
TJ
TSTG
Fig.21
Value
-55 to +125
-55 to +150
Units
O_C
O_C
Symbol
V_RWM
V_BR
I_R
V_C
V_C
C
J
Conditions
-
I _T=1mA
V_RWM = 3.3V,
T = 25^OC
I _PP = 1A
t _p = 8/20 μs
I _PP = 5A
t _p = 8/20 μs
Between pin1.2 to 3
V_R=0V,f=1MHz
Min.
Typ.
Max.
Units
-
-
3.3
V
4
-
-
V
-
-
50
μA
-
-
6.5
V
-
-
8
V
-
-
1.2
pF
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