BD640CT Datasheet, PDF (1/2 Pages) Pan Jit International Inc. – SURFACE MOUNT SCHOTTKY BARRIER RECTIFIERS

BD640CT~BD6200CT
SURFACE MOUNT SCHOTTKY BARRIER RECTIFIERS
VOLTAGE 40 to 200 Volts CURRENT ^{6.0 Amperes}
FEATURES
• Plastic package has Underwriters Laboratory
Flammability Classification 94V-O
• For surface mounted applications
• Low profile package
• Built-in strain relief
• Low power loss, High efficiency
• High surge capacity
• For use in low voltage high frequency inverters, free wheeling, and
polarity protection applications
• High temperature soldering guaranteed:260^oC/10 seconds at terminals
• In compliance with EU RoHS 2002/95/EC directives
MECHANICAL DATA
• Case: TO-251AB molded plastic
• Terminals: Solder plated, solderable per MIL-STD-750,Method 2026
• Polarity: As marking
• Standard packaging: 16mm tape (EIA-481)
• Weight: 0.0104 ounces, 0.297grams.
TO-251AB
.264(6.7)
.248(6.3)
.216(5.5)
.200(5.1)
.032(0.8)
.012(0.3)
.09 .09
(2.3) (2.3)
Unit : inch (mm)
.098(2.5)
.082(2.1)
.024(0.6)
.016(0.4)
.071(1.8)
.051(1.3)
.02(0.5)
MAXIMUM RATINGS
Ratings at 25°C ambient temperature unless otherwise specified. Single phase, half wave, 60 Hz, resistive or inductive load.
For capacitive load, derate current by 20%
PARAMETER
S YMB OL BD640CT BD645CT BD650CT BD660CT BD680CT BD690CT BD6100CT BD6150CT BD6200CT UNITS
Maximum Recurrent Peak Reverse Voltage
V _RRM
40
45
50
60
80
90
100 150 200
V
Maximum RMS Voltage
V _RMS
28
31.5
35
42
56
63
70
105 140
V
Maximum DC Blocking Voltage
V_DC
40
45
50
60
80
90
100 150 200
V
Maximum Average Forward Current (See Figure 1)
I_F(AV)
Peak Forward Surge Current :8.3ms single half sine-wave
superimposed on rated load(JEDEC method)
I_FSM
Maximum Forward Voltage at 3.0A per leg
Maximum DC Reverse Current TJ=25^OC
at Rated DC Blocking Voltage TJ=100^OC
V_F
0.70
I
R
Typi cal Thermal Resi stance
R _{θJ C}
6.0
75
0.75
0.80
0.05
20
5
A
A
0.90
V
mA
O_{C / W}
Op e ra ti ng J unc ti o n a nd S to ra g e Te mp e ra ture Ra ng e
T_J,T_STG -55 to +150
-65 to +175
O_C
Note: Both Bonding and Chip structure are available.
STAD-APR.30.2009
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