AN5392FBQ Datasheet, PDF (7/23 Pages) Panasonic Semiconductor – Luminance and color difference drive/cutoff signal processor IC with I2C bus

ICs for TV
AN5392FBQ
s Electrical Characteristics at V_CC1 = 9 V, V_CC2 = 5 V, T_a = 25°C (continued)
Parameter
Symbol
Conditions
Min Typ Max Unit
Color difference-system (continued)
Matrix ratio
(G−Y/R−Y) HD ^*7
M1 Tint SW: HD
G−Y matrix: HD
0.23 0.30 0.35 Times
Matrix ratio
(G−Y/R−Y) NTSC 1 ^*7
M2 Tint SW: NTSC
G−Y matrix: NTSC 1
0.38 0.51 0.58 Times
Matrix ratio
(G−Y/R−Y) NTSC 2 ^*7
M3 Tint SW: NTSC
G−Y matrix: NTSC 2
0.26 0.34 0.40 Times
Matrix ratio
(G−Y/R−Y) NTSC 3 ^*7
M4 Tint SW: NTSC
G−Y matrix: NTSC 3
0.26 0.34 0.40 Times
Matrix ratio
(G−Y/B−Y) HD ^*7
M5 Tint SW: HD
G−Y matrix: HD
0.07 0.10 0.13 Times
Matrix ratio
(G−Y/B−Y) NTSC 1 ^*7
M6 Tint SW: NTSC
G−Y matrix: NTSC 1
0.15 0.19 0.23 Times
Matrix ratio
(G−Y/B−Y) NTSC 2 ^*7
M7 Tint SW: NTSC
G−Y matrix: NTSC 2
0.22 0.28 0.34 Times
Matrix ratio
(G−Y/B−Y) NTSC 3 ^*7
M8 Tint SW: NTSC
G−Y matrix: NTSC 3
0.13 0.17 0.21 Times
OSD
Y_S input threshold voltage ^*8
M/S input threshold voltage ^*8
Y_M input threshold voltage ^*8
Y_STH
M/S_TH
Y_MTH
Pin 36 > 2.1 V: OSD
Pin 36 < 0.9 V: Main & sub
Pin 55 > 2.1 V: Sub
Pin 55 < 0.9 V: Main (M1, M2)
Pin 35 > 2.1 V: Half tone
Pin 35 < 0.9 V: Main & sub
0.9 1.5 2.1 V
0.9 1.5 2.1 V
0.9 1.5 2.1 V
CLP input threshold voltage
CLP_TH Pin 56, 60 (main, sub, OSD)
Pin 6 (RGB)
0.9 15 2.1 V
Pulse width can be clamped
W_M Pin 56, 60 (main, sub, OSD)
Pin 6 (RGB)
0.8   µs
OSD gain
OSD frequency characteristics
OSD contrast ratio 1
OSD contrast ratio 2
G_OSD
f_OSD
OSD_C1
OSD_C2
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, Y_S pin: 5 V
Input: Sine wave 0.2 V[p-p]
f = 30 MHz, Y_S pin: 5 V
Contrast: max. → typ.
Y_S pin: 5 V
Contrast: typ. → min.
Y_S pin: 5 V
5.0 6.0 7.2 Times
−7 −3 +1 dB
−3 −1 +1 dB
−16 −11 −7 dB
Note) *7: Adjust tint, drive R, B
*8: SW priority: YS > M/S > M1/M2 (I²C), YS: YM is valid at low.
7