MN65771F Datasheet, PDF (5/6 Pages) Panasonic Semiconductor – Low Power 10-Bit 5 V CMOS A/D Converter for Image Processing

A/D, D/C Converters for Image Signal Processing
MN65771F
Timing Chart
The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital
output 2.5 clock cycles later at the rising edge of the clock signal.
Clock
t_WH t_WL
Analog input
Data output
N
N+1
t_sd(7ns)
N–3
N–2
t_d(20ns)
N+2
N+3
N–1
N
Note: The circles indicate analog signal sampling points.
N+4
N+1
5