MN3885S Datasheet, PDF (5/6 Pages) Panasonic Semiconductor – NTSC-Compatible CCD Video Signal Delay Element

CCD Delay Line Series
Application Circuit Example
MN3885S
10µF
–+
0.1µF
VINC 8
0.01µF
Bias circuit
Charge input
block
CCD 454 stages
Charge
detection block
Resampling
output amplifier
330Ω
1 _VOC
2SA564
øS driver
ø1 driver
Timing adjustment
ø2 driver
øR driver
øSH driver
øSH driver
XI 7
1000pF
VINY 5
0.47µF
Waveform amplifier
adjustment block
øS' driver
Charge input
block
Clamp circuit
CCD 453.5 stages
Substrate bias
generator
Charge
detection block
330Ω
Resampling
4 VOY
output amplifier
2SA564
0.01µF
Note: If the external capacitor attached to pin 6 is a electrolytic capacitor, connect the negative pole to pin 6.
5