AN8539SH Datasheet, PDF (5/6 Pages) Panasonic Semiconductor – 300 MHz-band single PLL IC

ICs for Mobile Communication
s Application Notes (continued)
1. Input level characteristics (continued)
2) REF input level characteristics
20 ^{Upper limit}
10
VCC = 2.55 V to 3.3V
Ta = −30°C, 25°C, 85°C
AN8539SH
0
Lower limit
T_a = 25°C
−10
T_a = −30°C
−20
Ta = 85°C
−30
0
5
10
15
20
25
30
Input frequency (MHz)
2. Characteristics specification
1) IF select specification
SELECT pin control enables you to switch IF as below:
SELECT = low → f_OUT = 129.55 MHz, f_R = 50 kHz (P = 16, N = 161, A = 15, R = 256)
SELECT = high → f_OUT = 178 MHz, f_R = 400 kHz (P = 16, N = 27, A = 13, R = 32)
2) Unlock detection and LD output specification
LD output is high in a lock mode and low in an unlock mode. Lock signal is outputted in a power save mode.
SELECT = high : Detection time is 2.6 µs. About detection accuracy, when a dividing output shifts
by ±(78 × 3) ns for f_REF = 400 kHz, it generates an unlock output.
SELECT = low : Detection time is 20 µs. About detection accuracy, when a dividing output shifts
by ±(78 × 3) ns for f_REF = 50 kHz, it generates an unlock output.
3) Power save control specification
When power save control pin (PS) is high, it is set to an operating mode. When it is low, it is set to power save mode.
4) Analog SW control specification
CPSUB is controlled by SW pin.
SW = low : CPSUB open
SW = high: CPSUB operation
5) Other specification
Set CMOS input pins, such as PS pin, SW pin, SELECT pin, etc., normally to V_CC or GND.
5