AN8725FH Datasheet, PDF (4/36 Pages) Panasonic Semiconductor – Semiconductor laser power control IC

AN8725FH
ICs for Optical Disk Drive
s Pin Descriptions (continued)
Pin No. Symbol Category
20
SGND PS D
21
SGND PS D
22
DT 4
I/O D
23
DT 5
I/O D
24
DT 6
I/O D
25
DT 7
I/O D
26
XLDEN INU D
27
XCLR IND D
28
DGND PS D
29 XLDERR OUT D
30
PWMSK MSC D
Description
Pin connected to the chip substrate.
Must be used in the same potential as other GND pins.
Data I/O 8-bit bus pin.
The bus to set the data to be written on a register and to read out the data
of a register.
LD enable input pin.
In a high-level or open mode, LD becomes off and open. This state is suited
to check the LD characteristics in keeping a connection to the IC. At the
time power off, both ends of LD are short-circuited by the IC for protection.
In the low-level, it returns to a normal operation.
Clear signal input pin.
Sets an LDDENB register to "0" in the low-level and presets the status of
each DAC and each switch to an initial state as defined separately.
But six registers for an abnormal detection are not cleared. In this state,
each output of a current amplification 1, 2, 3 are in the off state and a
shunt circuit becomes on to continue to protect LD.
Setting this pin to the high-level and the LDDENB register to "1", it returns
to a normal operation.
GND pin exclusive for a logic circuit.
Must be used in the same potential as other GND pins.
Laser abnormality detection output pin.
When a supply voltage or a laser light emission exceeds a fixed range, it
goes to low-level. A supply voltage abnormality is detected for the volt-
age drop (3.9 V or less) or voltage rise (6.1 V or more). And an abnormal
light emission is detected for an excessive or weaker light emission set up
by 4-bit DAC5 and DAC6. This abnormality detection is latched so as to
prevent it from being reset until ERRCLR register is set to "1".
Further, each DAC output of a playback current, a peak current and a bias
current can be set to off, a shunt circuit be set to on and LD between anode
and GND be short-circuited by 100 Ω so that LD can be protected. This
protection function is latched to keep it from being reset until ERRCLR is
set to "1". Selection of either operation or non-operation for this opera-
tion can be made by an STPMSK register.
The pin to set up the mask time for a transitional response output that
comes out at switching a detection level of excessive or insufficient light
emission by RPHOLD. Set a mask time by an external capacitor between
PWMSK and DGND and the resistor (10 kΩ) inside the IC. This pin is for
a schmitt-trigger input.
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