MN39592PJ Datasheet, PDF (3/9 Pages) Panasonic Semiconductor – CCD Area Image Censor MN39592PJ

„ Terminal description
1. Terminal description
Terminal No
1 pin
2 pin
3 pin
4 pin
5 pin
6 pin
7 pin
8 pin
9 pin
10 pin
11 pin
12 pin
13 pin
14 pin
15 pin
16 pin
Name
VφV4
VφV6
VφV3
VφV2
VφV5
VφV1
VOG
VO
VOD
VφRG
PW
VSUB
BSUB
VPT
VφH1
VφH2
2. Alignment of terminals
Terminal description
Vertical shift register clock pulse (4)
Vertical shift register clock pulse (6)
Vertical shift register clock pulse (3)
Vertical shift register clock pulse (2)
Vertical shift register clock pulse (5)
Vertical shift register clock pulse (1)
Output gate
CCD output
Output drain
Reset pulse
GND
Circuit board
Breeder SUB
Protection P wel
Horizontal shift resistor clock pulse (1)
Horizontal shift resistor clock pulse (2)
3. Device parameter
Parameter
Total pixel number
Available pixel number
(including trangents)
Effective pixel numbers
Pixel size
Effective picture size
Numeric value
2,140(H) × 1,560(V) = 3,338,400
2,088(H) × 1,550(V) =3,236,400
2,048(H) × 1,536(V) =3,145,728
2.8 × 2.8
5.7344(H) × 4.3008(V)
Unit
pcs
pcs
pcs
µm²
µm²