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MN39571PT Datasheet, PDF (3/4 Pages) Panasonic Semiconductor – 9.2mm (type-1/2) 2,310k pixel CCD Area Image Sensor
CCD Area Image Sensor
MN39571PT
s Absolute Maximum Ratings and Operating Conditions
Parameter
Symbol
Rating
Operating condition
min
max
min
typ
max
Unit
Output drain voltage
Reset drain voltage
Input source voltage
Protection P-well voltage
P-well voltage
Output load transistor
gate voltage
VOD
VRD
VIS
VPT *2
VPW
VLG
− 0.2
18.0
15.2
15.5
15.8
V
− 0.2
18.0
15.2
15.5
15.8
V
− 0.2
18.0
15.2
15.5
15.8
V
− 10.0 0.2
− 9.3 − 9.0 − 8.7
V
Reference voltage 
0

V


Supplied internally
V
Output gate voltage
Resetɹ
H-L
pulse voltage
Bias
Horizontal register
clock pulse voltage 1
Horizontal register
clock pulse voltage 2
Vertical shift register
clock pulse voltage 1,5
Vertical shift register
clock pulse voltage 3,7
Vertical shift register
clock pulse voltage 2,6
Vertical shift register
clock pulse voltage 4,8
Substrate voltage
Operating temperature
Storage temperature
VOG


Supplied internally
V
VφRG(H-L) *3

8.0
3.0
3.3
3.6
V
VφRG(Bias)*3
− 0.5

Supplied internally
V
VφH1(H)

8.0
3.0
3.3
3.6
V
VφH1(L)
− 0.2

− 0.2
0
0.2
VφH2(H)

8.0
3.0
3.3
3.6
V
VφH2(L)
− 0.2

− 0.2
0
0.2
VφV1,5(H) *2

18.0
15.2
15.5
15.8
V
VφV1,5(M) *2


− 0.2
0
0.2
VφV1,5(L) *2
− 10.0

− 9.3 − 9.0 − 8.7
VφV3,7(H) *2

18.0
15.2
15.5
15.8
V
VφV3,7(M) *2


− 0.2
0
0.2
VφV3,7(L) *2
− 10.0

− 9.3 − 9.0 − 8.7
VφV2,6(M) *2

15.0 − 0.2
0
0.2
V
VφV2,6(L) *2
− 10.0

− 9.3 − 9.0 − 8.7
VφV4,8(M) *2

15.0 − 0.2
0
0.2
V
VφV4,8(L) *2
− 10.0

− 9.3 − 9.0 − 8.7
VSub*2
Supplied internally
V
φVSub *4,*5
− 0.2 45.0
26.5
27.0
27.5
Topr
− 10
60

25

°C
Tstg
− 30
70



°C
Note)1. Standard light input defines
Standard light input is the one when the exposure is done at a lens aperture of F8, using a light source of 2856 K and 1050 nt, and
placing a color temperature conversion filter LB-40 (HOYA) and an IR cutting filter CAW-500 (t = 2.5 mm) in the light path.
ɹ 2. *1: VSub internal settings guarantee blooming at 400 times light input of the standard light input.
3. *2: VPT is set so that the following conditions are set for VL of the vertical shift clock.
VPT <= VL
4. *3: VφR(H)
VφR(L)
E
H-L
Bias (Internally)
5. *4: VSub when using electronic shutter function
φVSub "H"
φVSub(V)
φVSub "L"
VSub(V)
E
6. *5: Separate powor supply is recommended for φVSub
3