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AN15865A Datasheet, PDF (21/37 Pages) Panasonic Semiconductor – The video switch IC including the synchronous separation function for TV
AN15865A
„ I2C Bus Conditions (continued)
y The AN15865A selects slave address 85 or 8D(hex) according to the status of the SLVADR pin.
Address 85(hex) will be selected with the SLVADR pin grounded the the GND side. Address 8D(hex) will be selected with the pin
grounded to the 5-V line.
Status register
S
Slave Address
(85 or 8D)
AM
DATA
(X)
AM
DATA
(X + 1)
AM
DATA
(X + 2)
continue
Note) AM = Ack from Master
R/W = 1
DATA0
DATA1
DATA2
D7
Aspect ratio
SA3
Pin detect
SB3
0 : Open
1 : connect
Sync status
0 : 2 value
1 : 3 value
D6
D5
00 : 4:3 video
signal
01 : 4:3 letter-
box
10 : 16:9 video
signal
11 : No use
Aspect ratio
SA4
Pin detect
SB4
0 : Open
1 : connect
Pin detect
SB5
0 : Open
1 : connect
MACRO
VISION
detection
(OUT5)
0 : normal signal
1 : macro vision
signal
auto distinc.
Result
CVSYdet
0 : SY
1 : CV
D4
00 : 4:3 video
signal
01 : 4:3 letter-
box
10 : 16:9 video
signal
11 : No use
Pin detect
SB6
0 : Open
1 : connect
auto distinc.
Result
sync fix
0 : continue
1 : fix
D3
Aspect ratio
SA5
D2
00 : 4:3 video
signal
01 : 4:3 letter-
box
10 : 16:9 video
signal
11 : No use
D1
Aspect ratio
SA6
D0
00 : 4:3 video
signal
01 : 4:3 letter-
box
10 : 16:9 video
signal
11 : No use
AFC-LOCK
0 : unlock
1 : lock
OUT5
System status
000 : 480i / 60
001 : 480p / 60
010 : 1 080i / 60
011 : 720p / 60
100 : 576i / 50
101 : 576p / 50
110 : 1 080i / 50
111 : 720p / 50
Australia
Signal detect
interlace
0 : except
Australia
Australia format 0 : no signal
0 : 1 152i
1 : 1 152i(letter) 1 : signal
0
1 : Australia
input
Note) The default data at the time of power-on is 0.
SDB00102AEB
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