MN3814 Datasheet, PDF (2/6 Pages) Panasonic Semiconductor – NTSC CCD Video Signal Delay Elements

MN3814, MN3814S
Block Diagram
CCD Delay Line Series
V_IN ^{5 (13)}
Bias circuit
906-stage CCD analog shift
register
øS
ø1
ø2
øR
Clock driver
Resampling
output
amplifier
øSH
(6) 4
V_O
Substrate bias
generator
Timing adjustment
Waveform
adjustment
(4) 2 _XI
The numbers in parentheses are the pin numbers for the MN3814S.
2