MN3307 Datasheet, PDF (2/5 Pages) Panasonic Semiconductor – 1024-Stage Ultra Low Voltage Operation BBD for Audio Signals

MN3307
MN3300 Series
s Absolute Maximum Ratings Ta=25°C
Parameter
Symbol
Ratings
Unit
Pin voltage
Output voltage
Operating ambient temperature
Storage temperature
V_DD, V_D1, V_D2, V_CP, V_I
− 0.3 to +6.0
V
V_O
− 0.3 to +6.0
V
T_opr
−20 to +60
°C
T_stg
−55 to +125
°C
s Operating Conditions Ta=25°C
Parameter
Symbol
Supply voltage
Clock voltage "H"level
Clock voltage "L"level
Clock input capacitance
Clock frequency
Clock pulse width
Clock rise time
Clock fall time
Clock cross point
Note) *1 : ( ) : V_DD=4.0 to 5.0 V
*2 : T=1/f_CP (Clock period)
V_DD
V_CPH
V_CPL
C_CP
f_CP
t_w(CP)*3
t_r(CP)*3
t_f(CP)*3
V_X*3
Conditions
*3 : Clock pulse waveforms
CP2
CP1
min typ max
+1.8 +3.0 +5.0
V_DD
0
700
10
200(500)^*1
0.5T^*2
500
500
0
0.3V_CPH
t_r(CP)
90%
50%
t_f(CP)
10%
t_w(CP)
T
Unit
V
V
V
pF
kHz
ns
ns
V
3V
V_X
s Electrical Characteristics V_DD=V_CPH=3V, V_CPL=0V, R_L=56kΩ, LPF : f_C=20kHz, A_tt=48dB/oct., Ta=25°C
Parameter
Symbol
Conditions
min typ max Unit
Supply current
Signal delay time 1
Signal delay time 2
Input signal frequency
Input signal amplitude
Insertion loss
Total harmonic distortion
Output noise voltage
Signal to noise ratio
I_DD f_CP=40 kHz
0.05
mA
t_D1 V_DD=1.8 to 4.0 V, f_CP=10 to 200 kHz
N^*
ms
t_D2 V_DD=4.0 to 5.0 V, f_CP=10 to 500 kHz
2·f_CP
f_i
f_CP=40 kHz, V_i=0.22 V_rms
11
kHz
Output attenuation≤3 dB(0 dB at f_i=1 kHz)
υ_i
f_CP=40 kHz, f_i=1 kHz, THD=2.5 %
0.31 0.45
V_rms
L_i
f_CP=40 kHz, f_i=1 kHz, V_i=0.22 V_rms
−4
0
4
dB
THD f_CP=40 kHz, f_i=1 kHz, V_i=0.22 V_rms
0.6 2.5
%
V_no f_CP=100 kHz, Weighted by "A"curve
0.15 0.25 mV_rms
S/N
69
dB
Note) * : N=BBD stages
s Circuit Diagram
8 V_D2
IN 3
1
2
3
1024
1025
7 OUT
GND 1
V_DD 4
CP1 6
CP2 2
5 V_D1
2