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MN101C74F Datasheet, PDF (2/4 Pages) Panasonic Semiconductor – MN101C74F
MN101C74F, MN101C74G
Timer counter 8 : 16 bit × 1
(square-wave/16-bit PWM output [duty continuous variable], event count, pulse width measurement, input capture)
(square-wave/PWM output to large current terminal PC6 possible)
Clock source................ 1/1, 1/2, 1/4, 1/16 of system clock frequency; 1/1, 1/2, 1/4, 1/16 of OSC oscillation clock frequency; 1/1,
1/2, 1/4, 1/16 of external clock input frequency
Interrupt source ........... coincidence with compare register 8 (2 lines), input capture register
Timer counters 7, 8 can be cascade-connected. (square-wave output, PWM is possible as a 32-bit timer.)
Time base timer (one-minute count setting)
Clock source................ 1/1 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency
Interrupt source ........... 1/128, 1/256, 1/512, 1/1024, 1/4096, 1/8192, 1/16384, 1/32768, of clock source frequency
Watchdog timer
Interrupt source ........... 1/65536, 1/262144, 1/1048576 of system clock frequency
 Serial interface
Serial 0 : synchronous type/UART (full-duplex) × 1
Clock source................ 1/2, 1/4 of system clock frequency; pulse output of timer counter 1 or 2; 1/2, 1/4, 1/16, 1/64 of OSC
oscillation clock frequency, external clock
Serial 1 : synchronous type/UART (full-duplex) × 1
Clock source................ 1/2, 1/4 of system clock frequency; pulse output of timer counter 2 or 3; 1/2, 1/4, 1/16, 1/64 of OSC
oscillation clock frequency, external clock
Serial 3 : synchronous type/single-master I²C × 1
Clock source................ 1/2, 1/4 of system clock frequency; pulse output of timer counter 2 or 3; 1/2, 1/4, 1/16, 1/32 of OSC
oscillation clock frequency, external clock
Serial 4 : I²C slave × 1 (Applicable for I²C high-speed transfer mode, 7-bit/10-bit address setting, general call)
 DMA controller
Max. Transfer cycles 255
Starting factor external request, various types of interrupt, software
Transfer mode 1-byte transfer, word transfer, burst transfer
 I/O Pins
I/O
87
Common use , Specified pull-up resistor available, Input/output selectable (bit unit)
 A/D converter
10-bit × 16-ch. (with S/H)
 Display control function
LCD
47 segments × 4 commons (static, 1/2, 1/3, or 1/4 duty)
LCD power supply separated from VDD (usable if VDD ≤ VLCD ≤ 3.6 V)
LCD power step-up circuit contained (3/2, 2 and 3 times)
LCD power shunt resistance contained
 Special Ports
Buzzer output, remote control carrier signal output, high-current drive port
 ROM Correction
Correcting address designation : up to 7 addresses possible
MAD00048DEM