MN103SK7 Datasheet, PDF (1/3 Pages) Panasonic Semiconductor – Transfer method: 2-bus cycle transfer

MN103SK7 Series
Type
Internal ROM type
ROM (byte)
RAM (byte)
Package (Lead-free)
Minimum Instruction
Execution Time
MN103SK7N
512K
32K
MN103SK7Q
Mask ROM
768K
40K
UBGA257-P-1111A
16.7 ns (at 2.7 V to 3.6 V, 60 MHz)
MN103SK7R
1024K
 Interrupts
RESET. IRQ × 11. NMI. Key input. Timer × 32. Input capture × 16. PWM × 6. SIF × 24. I²C × 4. DMA × 18. WDT. A/D. System error
 Timer Counter
8-bit timer × 8
Reload-down count. Cascade connection possible (usable as a 16-bit to 32-bit timer)
16-bit timer × 6
Up-down count. Input capture. PWM output. Compare/capture register 2 channnels
16-bit timer × 6
Reload-down count
Watchdog timer × 1
 Serial interface
UART/Synchronous interface selective × 10: Serial 0, 1, 3 to A
Start-stop synchronization/Synchronization commonly used (16 bytes containing transmission/reception FIFO): Serial 2
I²C serial interface, multi master transmission/reception function × 2
 DMA controller
Number of channels: 6 channels
Unit of transfer: 8/16/32 bits
Maximum transfer cycles: 65535
Starting factor: External interrupt. Timer. Input capture. PWM. Serial transmission/reception. I²C transmission/reception. A/D conversion
finish. Software
Transfer method: 2-bus cycle transfer
Adressing modes: Fixed. Increment. Decrement
Transfer mode: Word transfer. Burst transfer. Intermittent transfer
 I/O Pins
I/O
Input
194 : Common use
1 : Exclusive
 A/D converter
10-bit × 32 channels
 PWM
12/14-bit resolution × 6 channels
 ICR
28-bit × 13 channels + 16-bit × 6 channels (common with timer)
 OCR
16-bit × 12 channels (common with timer)
 Timer Synchronous Output
4-bit (synchronous output) × 2 channels
 ROM Correction
8 channels
MAF00038BEM