MN103S65G Datasheet, PDF (1/3 Pages) Panasonic Semiconductor – 4 K-byte SRAM

MN103S65G
Type
Internal ROM
Internal RAM
Package
Minimum Instruction
Execution Time
Interrupts
Timer Counter
MN103S65G
128 K-byte
4 K-byte SRAM
LQFP080-P-1414A ^*Lead-free
25 ns (at 4.3 V to 5.5 V, 10 MHz internal regulator used)
25 ns (at 3.0 V to 3.6 V, 10 MHz)
*at internal 4 times oscillation used)
• 9 external interrupts
• 42 internal interrupts (watch dog timer, timer, serial I/F, PWM, A/D, system error)
Eight 8-bit timers
Interval timer, Event counter, Cascading
Four 16-bit timers
Interval timer, Event counter, PWM output, Double buffer
Watch dog timer
Serial Interface
UART (full duplex) / synchronous interfaces selective: 3
I/O Pins
I/O
50 exclusive: 2, selective: 48
Input 10 selective: 10
A/D Inputs
PWM
Electrical Characteristics
10-bits, 2 inputs: 2, 6 inputs: 1
Minimum conversion time 1.5us
3-phase PWM output
16-bit counter, triangular waveform or jigsaw waveform dead time setup,
Double buffer
T.B.D.
MAF00010AEM