MN102H81G Datasheet, PDF (1/3 Pages) Panasonic Semiconductor – MN102H81G

MN102H81G
Type
ROM (× 8-bit)
RAM (× 8-bit)
Package
Minimum Instruction
Execution Time
Interrupts
Timer Counter
Serial Interface
Caption
I/O Pins
I/O
A/D Inputs
PWM
Special Ports
CRTC
Notes
MN102H81G
128 K
4K
QFP084-P-1818E ^*Lead-free
83 ns (at 3.135 V to 3.465 V, 12 MHz)
External (5 lines)
Internal (28 lines) : Timer × 11, A/D × 1, Undefined command × 1, RESET × 1, OSD × 2, Serial × 1,
I²C × 1, Caption × 2, Remote control × 1, Address coincidence × 4, HSYNC× 1, VSYNC× 1
8-bit timer × 10
Watchdog timer: 17-bit × 1
I²C × 1: for multimaster mode, bus line (output) has 2 systems
Sync serial / UART × 1
• Built-in sync separator × 1
30 • Common use
10-bit × 8-ch. (with S/H)
8-bit × 6-ch.
Remote control reception
3-layer display (graphics, characters, splits)
Remote control input discriminant circuit built-in,
build-in NTSC video signal processing circuit, built-in 3-line comb filter
MAE00017CEM