MN101E03G Datasheet, PDF (1/3 Pages) Panasonic Semiconductor – Remote control input discriminant circuit built-in, build-in NTSC video signal processing circuit, built-in 3-line comb filter

MN101E03G
Type
ROM (×16-bit)
RAM (×16-bit)
Package
Minimum Instruction
Execution Time
Interrupts
Timer Counter
Serial Interface
Caption/Teletext Decoder
I/O Pins
I/O
A/D Inputs
PWM
Special Ports
CRTC
Notes
MN101E03G [ES (Engineering sample available)]
128 K
4K
QFP084-P-1818E ^*Lead-free
100 ns (at 3.135 V to 3.465 V, normal-mode)
External (7 lines)
Internal (13 lines) : Timer × 4, A/D × 1, RESET × 1, OSD × 1, Serial × 2,
I²C × 1, Caption × 1, Remote control × 1, HSYNC× 1, VSYNC× 1
8-bit timer × 4
Watchdog timer: Time-out period is selectable.
I²C × 1: for multimaster mode, bus line (output) has 2 systems
Sync serial / UART × 1
• Built-in sync separator × 1
35 • Common use
10-bit × 8-ch. (with S/H)
8-bit × 6-ch.
Remote control reception
1-layer display (graphics, characters, splits)
Remote control input discriminant circuit built-in,
build-in NTSC video signal processing circuit, built-in 3-line comb filter
1
MAD00041AEM