PAM3110 Datasheet, PDF (7/13 Pages) Power Analog Micoelectronics – 1.5A Low Dropout Voltage CMOS Regulator

PAM3110
1.5A Low Dropout Voltage CMOS Regulator
Application Information
The PAM3110 family of low-dropout (LDO)
regulators have several features that allow them
to apply to a wide range of applications. The
family operates with very low input voltage and
low dropout voltage (typically 300mV at full load),
making it an efficient stand-alone power supply or
post regulator for battery or switch mode power
supplies. The 1.5A output current make the
PAM3110 family suitable for powering many
microprocessors and FPGA supplies.
External Capacitor Requirements
A 4.7µF or larger ceramic input bypass capacitor,
connected between V_IN and GND and located
close to the PAM3110, is required for stability. A
4.7 μF minimum value capacitor from V_O to GND is
also required. To improve transient response,
noise rejection, and ripple rejection, an additional
1 0 µF o r l a r g e r , l o w E S R c a p a c i t o r i s
recommended at the output. A higher-value, low
ESR output capacitor may be necessary if large,
fast-rise-time load transients are anticipated and
the device is located several inches from the
power source, especially if the minimum input
voltage of 2.5 V is used.
Regulator Protection
The PAM3110 features internal current limiting,
thermal protection and short circuit protection.
During normal operation, the PAM3110 limits
output current to about 2A. When current limiting
engages, the output voltage scales back linearly
until the over current condition ends. While
current limiting is designed to prevent gross
device failure, care should be taken not to exceed
the power dissipation ratings of the package. If
the temperature of the device exceeds 150°C,
thermal-protection circuitry will shut down. Once
the device has cooled down to approximately
30°C below the high temp trip point, regulator
operation resumes. The short circuit current of
the PAM3110 is about 0.5A when its output pin is
shorted to ground.
Thermal Information
The amount of heat that an LDO linear regulator
generates is:
P _D=(V _IN-V _O)I _O.
All integrated circuits have a maximum allowable
junction temperature (T_J max) above which
normal operation is not assured. A system
designer must design the operating environment
so that the operating junction temperature (T_J)
does not exceed the maximum junction
temperature (TJ max). The two main
environmental variables that a designer can use
to improve thermal performance are air flow and
external heatsinks. The purpose of this
information is to aid the designer in determining
the proper operating environment for a linear
regulator that is operating at a specific power
level.
In general, the maximum expected power
(P_D(max)) consumed by a linear regulator is
computed as:
( ) PDMAX= VI (avg)-VO (avg) ×IO (avg)+VI(avg)×I(Q)
Where:
l V_{I (avg)} is the average input voltage.
l V_O(avg) is the average output voltage.
l I_O(avg) is the average output current.
l I_(Q) is the quiescent current.
For most LDO regulators, the quiescent current is
insignificant compared to the average output
current; therefore, the term V_I(avg) xI_(Q) can be
neglected. The operating junction temperature is
computed by adding the ambient temperature (T_A)
and the increase in temperature due to the
regulator' s power dissipation. The temperature
rise is computed by multiplying the maximum
expected power dissipation by the sum of the
thermal resistances between the junction and the
case (R_θJC), the case to heatsink (R_θCS), and the
heatsink to ambient (R_θSA). Thermal resistances
are measures of how effectively an object
dissipates heat. Typically, the larger the device,
the more surface area available for power
dissipation so that the object’s thermal resistance
will be lower.
Power Analog Microelectronics, Inc
www.poweranalog.com
7
06/2011 Rev2.2