|
SCD55100A Datasheet, PDF (8/17 Pages) OSRAM GmbH – Dot Addressable Intelligent Display® Devices | |||
|
◁ |
SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A
The following explains how to format the serial data to be loaded
into the display. The user supplies a string of bit mapped decoded
characters. The contents of this string is shown in Figure âLoading
Serial Character Data aâ (page 8). Figure âLoading Serial Charac-
ter Data bâ (page 8) shows that each character consist of six 8 bit
words. The first word encodes the display character location and
the succeeding five bytes are row data. The row data represents
the status (On, Off) of individual column LEDs. Figure âLoading
Serial Character Data câ (page 8) shows that each 8 bit word is
formatted to include a three bit Operational Code (OPCODE)
defined by bits D7âD5 and five bits (D4âD0) representing Column
Data, Character Address, or Control Word Data.
Figure âLoading Serial Character Data dâ (page 8) shows the
sequence for loading the bytes of data. Bringing the LOAD line low
enables the serial register to accept data. The shift action occurs
on the low to high transition of the serial data clock (SDCLK). The
least significant bit (D0) is loaded first. After eight clock pulses the
LOAD line is brought high. With this transition the OPCODE is
decoded. The decoded OPCODE directs D4âD0 to be latched in
the Character Address register, stored in the RAM as Column
data, or latched in the Control Word register. The control IC
requires a minimum 600 ns delay between successive byte loads.
As indicated in Figure âLoading Serial Character Data aâ (page 8),
a total of 660 clock cycles (60-8 bit words) are required to load all
ten characters into the display.
The Character Address Register bits, D4âD0 (Table âLoad Charac-
ter Addressâ (page 9)) and Row Address Register bits, D7âD5
(Table âLoad Column Dataâ (page 9)) direct the Column Data bits,
D4âD0 (Table âLoad Column Dataâ (page 9)) to specific RAM loca-
tion. Table âCharacter âDââ (page 8) shows the Row Address for the
example character âD.â Column data is written and read asynchro-
nously from the 250 bit RAM. Once loaded the internal oscillator
and character multiplexer reads the data from the RAM. These
characters are row strobed with column data as shown in Figures
âRow and Column Locationâ (page 9) and âRow Strobingâ
(page 10). The character strobe rate is determined by the internal
or user supplied external MUX Clock and the ICâs ÷ 320 counter.
Character âDâ
Op code
Column Data
Hex
D7 D6 D5 D4 D3 D2 D1 D0
C0 C1 C2 C3 C4
Row 0 0 0 0
1 1 1 1 0 1E
Row 1 0 0 1
1 0 0 0 1 31
Row 2 0 1 0
1 0 0 0 1 51
Row 3 0 1 1
1 0 0 0 1 71
Row 4 1 0 0
1 1 1 1 0 9E
Loading Serial Character Data
Example: Serial Clock = 5 MHz, Clock Period = 200 ns
660 Clock Cycles, 132 µs
a. Character 0 Character 1 Character 2 Character 3 Character 4 Character 5 Character 6 Character 7 Character 8 Character 9
66 Clock Cycles, 13.2 µs
b.
Character 0 Row 0 Column Row 1 Column Row 2 Column Row 3 Column Row 4 Column
Address
Data
Data
Data
Data
Data
11 Clock Cycles, 2.2 s
11 Clock Cycles, 2.2 s
Character Address OPCODE
Time
Column Data
OPCODE
Time
c.
D0
0
D1
0
D2
0
D3
0
D4
0
D5
1
D6
0
D7
0
Between
Loads
600 ns(min.)
D0 D1
C4 C3
D2
C2
D3
C1
D4
C0
D5
D6
Between
D7 Loads
600 ns(min.)
LOAD
Serial
Clock
Clock
Period
d.
DATA
D0 D1 D2 D3 D4 D5 D6 D7 Time between LOADS
t0
2006-02-20
8
|
▷ |