Q68000A8643 Datasheet, PDF (4/10 Pages) OSRAM GmbH – X/Y Stackable 0.180’’ 4-Digit 5x7 Dot Matrix Alphanumeric Intelligent Display® Devices with Memory/Decoder/Driver

SLR2016, SLO2016, SLG2016, SLY2016, SCD5584A
Pin Function
Pin
Function
1
WR Write
2
A1 Digit Select
3
A0 Digit Select
4
V_CC
Pin
Function
8
D3 Data
9
D4 Data
10
D5 Data
11
D6 Data
Pin Function
Pin
Function
5
D0 Data
6
D1 Data
7
D2 Data
Pin
Function
12
BL Display Blank
13
CLR Clear
14
GND
DC Characteristics at 25°C
Parameters
V_CC
I_CC Blank
I_CC (80 dots on)
V_IL (all inputs)
V_IH (all inputs)
I_IL (all inputs)
Min.
4.5
—
—
—
2.0
25
Typ.
5.0
2.3
80
—
—
—
AC Characteristics (guaranteed minimum timing
parameters at V_CC=5.0 V ±0.5 V)
Parameter
Symbol –40°C +25°C +85°C Unit
Address Set T_AS
Up Time
10
10
10
ns
Write Time
T_W
Data Set Up T_DS
Time
60
70
90
ns
20
30
50
ns
Address Hold T_AH
Time
20
30
40
ns
Data Hold
T_DH
Time
20
30
40
ns
Access Time T_ACC ⁽¹⁾
90
Clear Disable T_CLRD
1.0
Time
110
140
ns
1.0
1.0
µs
Clear Time
T_CLR
1.0
1.0
1.0
ms
Note:
1) _{TACC=Set Up Time + Write Time + Hold Time}
Max.
5.5
3.0
105
0.8
—
100
Units
V
mA
mA
V
V
µA
Conditions
—
V_CC=5.0 V
V_CC=5.0 V
4.5 V <V_CC <5.5 V
4.5 V <V_CC <5.5 V
4.5 V <V_CC <5.5 V, V_IN=0.8 V
Timing Characteristics—Write Cycle Waveforms
A0 – A1
CLR
TAS
D0 – D6
WR
TDS
TW
TACC
2.0 V
0.8 V
TAH
2.0 V
0.8 V
TDH
2.0 V
0.8 V
Loading Data
The desired data code (D0–D6) and digit address (A0, A1) must
be held stable during the write cycle for storing new data.
Data entry may be asynchronous. Digit 0 is defined as right hand
digit with A1=A2=0.
Clearing the entire internal four-digit memory can be accomplished
by holding the clear (CLR) low for 1.0 msec minimum. The clear
function will clear the ASCII RAM. Loading an illegal data code will
display a blank.
2006-01-23
4