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PDSP1880 Datasheet, PDF (12/15 Pages) OSRAM GmbH – Alphanumeric Programmable Display™
PDSP1880, PDSP1881, PDSP1882, PDSP1883, PDSP1884
The second routine provides a visual test of the LEDs. This is
accomplished by writing checkered and inversed checkered pat-
terns to the display. Each pattern is displayed for approximately
2.0 sec. During the self test function the display must not be
accessed. The time needed to execute the self test function is cal-
culated by multiplying the clock time by 262,144 (typical
time ≈ 4.6 s). At the end of the self test, the Character RAM is
loaded with blanks; the Control Word Register is set to zeroes
except D5; the Flash RAM is cleared and the UDC Address Regis-
ter is set to all 1.0 sec.
Clear Function (see Figure „Control Word Data Definition“
(page 12) and Table „Clear Function“ (page 12))
Control Word bit, D7 clears the character RAM to 20 hex and the
flash RAM to all zeroes. The RAMs are cleared within three clock
cycles (110 µs minimum, using the internal clock) when D7 is set
to 1. During the clear time the display must not be accessed.
When the clear function is finished, bit 7 of the Control Word RAM
will be reset to a “0”.
Control Word Data Definition
Reset Function
The display should be reset on power up of the display
(RST=LOW). When the display is reset, the Character RAM, Flash
RAM, and Control Word Register are cleared.
The display's internal counters are reset. Reset cycle takes three
clock cycles (110 µs minimum using the internal clock). The dis-
play must not be accessed during this time.
To synchronize the flashing and blinking of multiple displays, it is
necessary for the display to use a common clock source and reset
all the displays at the same time to start the internal counters at
the same place.
While RST is low, the display must not be accessed by RD nor
WR.
D7
Clear
Function
D6
D5
Self Test
D4
D3
D2
D1
D0
Key
Blink
Flash
Function Function
Brightness Control
C Clear Function
ST Self test
BL Blink function
D3 Flash Function
0 Disabled
1 Enabled
D2 D1 D0 Brightness Control FL
0 0 0 100% Brightness Br
0 0 1 80% Brightness
0 1 0 53% Brightness
0 1 1 40% Brightness
1 0 0 27% Brightness
1 0 0 20% Brightness
1 1 0 13% Brightness
1 1 1 Blank Display
Flash function
Brightness control
D4 Blink Function
0 Disabled
1 Enabled (overrides Flash Function)
D6 D5 Self Test
0 X Normal Operation (X = bit ignored)
1 R Run Self Test, R = Test Result (1 = pass, 0 = fail)
D7 Clear Function
0 Normal Operation
1 Clear Flash RAM & Character RAM (Character RAM = 20 Hex)
IDCW5161
Clear Function
CE WR FL A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Operation
0
0
1
0
X
X
X
0
X
X
X
X
X
X
X
Clear disabled
0
0
1
0
X
X
X
1
X
X
X
X
X
X
X
Clear user RAM, flash RAM
and display
X=don’t care
2006-03-30
12