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RS2042_08 Datasheet, PDF (1/8 Pages) Orister Corporation – Green-Power PWM Controller with Freq. Jiggling
RS2042
Green-Power PWM Controller with Freq. Jiggling
Page No. : 1/8
Description
The RS2042 is a low startup current, low cost, current mode PWM controller with Green-Power & Burst-mode power-saving
operation. The integrated functions such as the leading-edge blanking of the current sensing, internal slope compensation
provide the users a high efficiency, low external component counts, and low cost solution for AC/DC power applications. The
special Green-Power function provides off-time modulation to linearly decrease the switching frequency under light-load
conditions. And under zero-load conditions, the power supply enters Burst-mode to further reduce power consumption by
shutting off PWM output. When the output of power supply is short or over loaded, the FB voltage will increase, and if the FB
voltage is higher than 5.2V for longer than 56msec the PWM output will be turned off. A external NTC resistor connected from
pin RT to ground can be applied to over-temperature protection. Pulse by pulse current limit ensures a constant output current
even under short circuit. PWM output will be disabled as long as VDD exceeds a threshold. When internal latch circuit is used to
latch-off the controller, the latch will be reset when the power supply VDD is disabled.
Features
 Low Cost, Green-Power Burst-Mode PWM
 Very Low Start-up Current (about 7.5μA)
 Low Operating Current (about 3.0mA)
 Current Mode Operation
 Under Voltage Lockout (UVLO)
 VDD Over Voltage Protection (OVP)
 Programmable over-temperature protection
 Internal Latch Circuit (OTP, OVP)
 Built-in soft start with 1ms
 Built-in Frequency Jiggling for better EMI Signature
Applications
 Power Adaptor
 Battery Charger Adapter
 Open Frame Switching Power Supply
 LCD Monitor
 Soft Clamped gate output voltage 16.5V
 VDD over voltage protect 25.5V
 Cycle-by-cycle current limiting
 Sense Fault Protection
 Output SCP (Short circuit Protection)
 Built-in Synchronized Slope Compensation
 Leading-edge blanking on Sense input
 Programmable PWM Frequency
 High-Voltage CMOS Process with ESD
 DIP-8 & SOP-8 Pb-Free Package
Pin Configurations
Name
GND
FB
VIN
RI
RT
SENSE
VDD
GATE
Description
GND Pin
Voltage feedback pin. The PWM duty cycle is determined by FB and Sense.
This pin is pulled high to the rectified line input through a large resistor for start-up. This pin is also used to detect
line voltage to compensate for constant output power limit for universal AC input.
By connecting a resistor to ground to set the switching freq.. Increasing the resistor will reduce the switching freq..
An NTC resistor is connected from this pin to ground for over-temperature protection.
Current sense pin, The sensed voltage is used for current-mode control and pulse-by-pulse current limiting.
Power supply voltage pin.
Gate drive output to drive the external MOSFET. A soft driving waveform is implemented to improve EMI.
DS-RS2042-03 Dec, 2008
www.Orister.com