English
Language : 

CAT4106HV4-GT2 Datasheet, PDF (9/17 Pages) ON Semiconductor – 6W Quad Channel DC/DC LED Driver with Diagnostics
SW pin is the drain terminal of the high voltage CMOS
power switch which has a typical on-resistance of 1 Ω
and is current limited to 1 A typically. An overvoltage
protection circuit places the device in a soft-clamping
low power mode if the voltage transients exceed 40 V.
VFMIN pin uses a pair of external resistors (R6 & R7)
to program the worst case, minimum LED string
forward voltage (VFMIN) expected in the specific
application. If, during power-up, any LED string enters
full regulation before this programmed level is reached
(VFMIN pin voltage < 1.2 V), the string will be
considered to contain LEDs which are short-circuit
and a fault condition will be flagged. The VFMIN input
circuitry consists of a comparator referenced to 1.2 V.
A typical value for resistor R7 is around 20 kΩ. R6 can
be calculated as follows:
R6
=
R7 × ⎜⎜⎝⎛
VFMIN
1.2 V
− 1⎟⎟⎠⎞
If this detection feature is not needed, the VFMIN pin
must be tied to ground.
VFMAX pin uses a pair of external resistors (R4 & R5)
to program the worst case, maximum LED string
forward voltage (VFMAX) expected in the specific
application. If any LED string fails to become
regulated before the programmed voltage is reached,
the string will be considered to contain LEDs which
are open-circuit and a fault condition will be flagged.
When an open-circuit is flagged, the individual
channel that causes the open-circuit is internally
flagged and subsequently ignored. In the event that all
channels are detected as being Open-LED, the
Output Voltage (top LED Anode) will stabilize at the
CAT4106
VFMAX programmed voltage. The VFMAX input
circuitry consists of a comparator referenced to 1.2 V.
A typical value for resistor R5 is 20 kΩ. R4 can be
calculated as follows:
R4
=
R5
×
⎜⎜⎝⎛
VFMAX
1.2 V
− 1⎟⎟⎠⎞
If this detection feature is not needed, the VFMAX pin
must be tied to ground.
¯F¯A¯U¯L¯T¯ is an open-drain, active-low, logic signal which
becomes active during an LED short-circuit or open-
circuit condition. The pin must be connected to a pull-
up resistor of around 100 kΩ tied to VIN. The drive
pull-down resistance (when active) is typically less
than 100 Ω. The diagnostic sequence used to
determine a fault condition is initiated when the device
is first enabled.
PGND pin is the source connection terminal of the
high voltage CMOS power switch in the DC/DC
converter. The inductor supply bypass capacitor
should be connected in close proximity to the PGND
pin. The return current from PGND should be
connected to the PCB ground plane.
GND is the ground reference pin for the device. All
analog control voltages are referenced to this pin. In
addition, all LED drive currents are conducted through
the GND pin.
TAB is the thermal pad connection of the package
and should be connected to PCB ground plane.
© 2009 SCILLC. All rights reserved.
9
Characteristics subject to change without notice
Doc. No. MD-5037, Rev. A