MC100LVEP34_14 Datasheet, PDF (8/11 Pages) ON Semiconductor – 2.5V / 3.3V ECL Clock Generation Chip

900
800
700
600
500
400
300
200
100
0
0
MC100LVEP34
1000
B4 / 8
B2
2000
3000
4000
FREQUENCY (MHz)
Figure 4. F_max
5000
9
8
7
6
5
4
3
2
1
6000
Q
Driver
Device
Q
Z_o = 50 W
Z_o = 50 W
50 W
50 W
D
Receiver
Device
D
V_TT
V_TT = V_CC − 2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device
Package
Shipping^†
MC100LVEP34DG
SOIC−16
(Pb−Free)
48 Units / Rail
MC100LVEP34DR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
MC100LVEP34DTG
TSSOP−16*
96 Units / Rail
MC100LVEP34DTR2G
TSSOP−16*
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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