CAT4109V-GT2 Datasheet, PDF (8/11 Pages) ON Semiconductor – 3-Channel Constant-Current RGB LED Driver with Individual PWM Dimming

CAT4109
APPLICATION INFORMATION
POWER DISSIPATION
The power dissipation (P_D) of the CAT4109 can be
calculated as follows:
( ) ( ) P_D = V_DD × I_DD + Σ V_LEDN ×I_LEDN
where V_LEDN is the voltage at the LED pin, and I_LEDN is
the associated LED current. Combinations of high
V_LED voltage or high ambient temperature can cause
the CAT4109 to enter thermal shutdown. In
applications where V_LEDN is high, a resistor can be
inserted in series with the LED string to lower P_D.
Thermal dissipation of the junction heat consists
primarily of two paths in series. The first path is the
junction to the case (θ_JC) thermal resistance which is
defined by the package style, and the second path is
the case to ambient (θ_CA) thermal resistance, which is
dependent on board layout. The overall junction to
ambient (θ_JA) thermal resistance is equal to:
θ_JA = θ_JC + θ_CA
For a given package style and board layout, the
operating junction temperature T_J is a function of the
power dissipation P_D, and the ambient temperature,
resulting in the following equation:
T_J = T_AMB + P_D (θ_JC + θ_CA)
= T_AMB + P_D θ_JA
When mounted on a double-sided printed circuit
board with two square inches of copper allocated for
“heat spreading”, the resulting θ_JA is about 74°C/W.
For example, at 60°C ambient temperature, the
maximum power dissipation is calculated as follow:
P_Dmax
=
(T_Jmax - T_AMB)
θ_JA
=
(150 - 60)
74
= 1.2W
RECOMMENDED LAYOUT
Bypass capacitor C1 should be placed as close to the
IC as possible. RSET resistors should be directly
connected to the GND pin of the device. For better
thermal dissipation, multiple via can be used to
connect the GND pad to a large ground plane. It is
also recommended to use large pads and traces on
the PCB wherever possible to spread out the heat.
The LEDs for this layout are driven from a separate
supply (VLED+), but they can also be driven from the
same supply connected to VDD.
Figure 3. Recommended Layout
Doc. No. MD-5042, Rev. A
8
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice