CAT9534WI-G Datasheet, PDF (7/16 Pages) ON Semiconductor – 8-bit I²C and SMBus I/O Port with Interrupt

CAT9534
¯IN¯T¯: _{Interrupt Output}
The open-drain interrupt output is activated when one
of the port pins configured as an input changes state
(differs from the corresponding input port register bit
state). The interrupt is deactivated when the input
returns to its previous state or the input port register is
read. Changing an I/O from an output to an input may
cause a false interrupt if the state of the pin does not
match the contents of the input port register.
Data from
Shift Register
Data from
Shift Register
Write
Configuration Pulse
Configuration
Register
D
Q
FF
CK
Q
Write Pulse
D
Q
FF
CK
Q
Output Port
Register
Q1
Q2
Output Port
Register Data
VCC
I/O₀ to I/O₇
Read Pulse
Input Port
Register
D
Q
LATCH
CK
Q
VSS
Input Port
Register Data
To INT
Data from
Shift Register
Write
Polarity
Register
D
Q
FF
CK
Q
Polarity
Inversion Register
Polarity
Register Data
Figure 4. Simplified Schematic of I/O₀ to I/O₇
© 2009 SCILLC. All rights reserved
7
Characteristics subject to change without notice
Doc. No. MD-9004 Rev. C