ADT7490_16 Datasheet, PDF (65/75 Pages) ON Semiconductor – Remote Thermal Monitor and Fan Controller

ADT7490
Table 92. REGISTER 0x78 − CONFIGURATION REGISTER 3 (POWER-ON DEFAULT = 0x00)
Bit No. Mnemonic R/W (Note 1)
Description
[0]
ALERT
Enable
R/W
ALERT = 1, Pin 10 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to
indicate out-of-limit error conditions.
ALERT = 0, Pin 10 (PWM2/SMBALERT) is configured as the PWM2 output.
[1]
THERM/
+2.5V_IN
R/W
THERM = 1 enables THERM functionality on Pin 22 and Pin 14, if Pin 14 is configured as
THERM, determined by Bit 0 and Bit 1 (Pin 14 Func) of Configuration Register 4 (0x7D).
When THERM is asserted, if the fans are running and the BOOST bit is set, then the fans run
at full speed. Alternatively, THERM can be programmed so that a timer is triggered to time
how long THERM has been asserted.
THERM = 0 enables +2.5V_IN measurement on Pin 22 and disables THERM. If Bits [5:7] of
Configuration Register 5 (0x7C) are set, THERM is bidirectional. If they are 0, THERM is a
timer input only.
Pin 14 Func (0x7D)
00
01
10
11
00
01
10
11
THERM/+2.5 V_IN (0x78)
0
0
0
0
1
1
1
1
Pin 22
+2.5 V_IN
+2.5 V_IN
+2.5 V_IN
+2.5 V_IN
THERM
+2.5 V_IN
THERM
THERM
Pin 14
TACH4
TACH4
SMBALERT
N/A
TACH4
THERM
SMBALERT
N/A
[2]
BOOST
R/W
When THERM is an input and BOOST = 1, assertion of THERM causes all fans to run at the
maximum programmed duty cycle for fail−safe cooling.
[3]
FAST
R/W
FAST = 1 enables fast TACH measurements on all channels. This increases the TACH mea-
surement rate from once per second to once every 250 ms (4x).
[4]
DC1
R/W
DC1 = 1 enables TACH measurements to be continuously made on TACH1. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
[5]
DC2
R/W
DC2 = 1 enables TACH measurements to be continuously made on TACH2. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
[6]
DC3
R/W
DC3 = 1 enables TACH measurements to be continuously made on TACH3. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
[7]
DC4
R/W
DC4 = 1 enables TACH measurements to be continuously made on TACH4. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
1. Bits [3:0] of this register become read-only when the Configuration Register 1 Lock (0x40) bit is set to 1. Any further attempts to write to
Bits [3:0] have no effect.
Table 93. REGISTER 0x79 − THERM TIMER STATUS REGISTER (POWER-ON DEFAULT = 0x00)
Bit No.
[0]
Mnemonic
ASRT/
TMR0
[7:1]
TMR
R/W
Description
R
This bit is set high on the assertion of the THERM input and is cleared on read. If the THERM
assertion time exceeds 45.52 ms, this bit is set and becomes the LSB of the 8-bit TMR
reading. This allows THERM assertion times from 45.52 ms to 5.82 sec to be reported back
with a resolution of 22.76 ms.
R
Times how long THERM input is asserted. These seven bits read 0 until the THERM
assertion time exceeds 45.52 ms.
Table 94. REGISTER 0x7A − THERM TIMER LIMIT REGISTER (POWER-ON DEFAULT = 0x00)
Bit No.
[7:0]
Mnemonic
LIMT
R/W
Description
R/W
Sets maximum THERM assertion length allowed before an interrupt is generated. This is an
8-bit limit with a resolution of 22.76 ms allowing THERM assertion limits of 45.52 ms to 5.82 sec
to be programmed. If the THERM assertion time exceeds this limit, Bit 5 (FAN4/THERM) of
Interrupt Status Register 2 (0x42) is set. If the limit value is 0x00, an interrupt is generated
immediately on the assertion of the THERM input. If THERM is configured as an output, the
THERM timer limit should be set to 0xFF to avoid unwanted alerts from being generated.
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