ADT7467_12 Datasheet, PDF (60/72 Pages) ON Semiconductor – Remote Thermal Monitor and Fan Controller

ADT7467
Table 56. FAN TACHOMETER LIMIT REGISTERS (Note 1)
Register Address
R/W
Description
Power-On Default
0x54
Read/Write
TACH1 Minimum Low Byte
0xFF
0x55
Read/Write
TACH1 Minimum High Byte/Single-channel ADC Channel Select
0xFF
0x56
Read/Write
TACH2 Minimum Low Byte
0xFF
0x57
Read/Write
TACH2 Minimum High Byte
0xFF
0x58
Read/Write
TACH3 Minimum Low Byte
0xFF
0x59
Read/Write
TACH3 Minimum High Byte
0xFF
0x5A
Read/Write
TACH4 Minimum Low Byte
0xFF
0x5B
Read/Write
TACH4 Minimum High Byte
0xFF
1. Exceeding any TACH limit register by 1 indicates that the fan is running too slowly or has stalled. The appropriate status bit is set in Interrupt
Status Register 2 to indicate the fan failure. Setting the Configuration Register 1 LOCK bit has no effect on these registers.
Table 57. REGISTER 0X55 − TACH 1 MINIMUM HIGH BYTE (POWER-ON DEFAULT = 0XFF)
Bit
Name
R/W
Description
<4:0>
Reserved
Read Only
These bits are reserved when Bit 6 of Configuration 2 Register (0x73) is set
(single-channel ADC mode). Otherwise, these bits represent Bits <4:0> of the
TACH1 minimum high byte.
<7:5>
SCADC
Read/Write
When Bit 6 of Configuration 2 Register (0x73) is set (single-channel ADC mode),
these bits are used to select the only channel from which the ADC makes
measurements. Otherwise, these bits represent Bits <7:5> of the TACH1 minimum
high byte.
Table 58. PWM CONFIGURATION REGISTERS
Register Address
R/W (Note 1)
Description
Power-On Default
0x5C
Read/Write
PWM1 Configuration
0x82
0x5D
Read/Write
PWM2 Configuration
0x82
0x5E
Read/Write
PWM3 Configuration
0x82
1. These registers become read−only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to
these registers fail.
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