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MC78T00_04 Datasheet, PDF (6/12 Pages) ON Semiconductor – 3.0 A Positive Voltage Regulators
MC78T00 Series
VOLTAGE REGULATOR PERFORMANCE
The performance of a voltage regulator is specified by its
immunity to changes in load, input voltage, power
dissipation, and temperature. Line and load regulation are
tested with a pulse of short duration (< 100 ms) and are
strictly a function of electrical gain. However, pulse widths
of longer duration (> 1.0 ms) are sufficient to affect
temperature gradients across the die. These temperature
gradients can cause a change in the output voltage, in
addition to changes caused by line and load regulation.
Longer pulse widths and thermal gradients make it
desirable to specify thermal regulation.
Thermal regulation is defined as the change in output
voltage caused by a change in dissipated power for a
specified time, and is expressed as a percentage output
voltage change per watt. The change in dissipated power
can be caused by a change in either the input voltage or the
load current. Thermal regulation is a function of IC layout
and die attach techniques, and usually occurs within 10 ms
of a change in power dissipation. After 10 ms, additional
changes in the output voltage are due to the temperature
coefficient of the device.
Figure 1 shows the line and thermal regulation response
of a typical MC78T05AC to a 20 W input pulse. The
variation of the output voltage due to line regulation is
labeled Πand the thermal regulation component is labeled
. Figure 2 shows the load and thermal regulation response
of a typical MC78T05AC to a 20 W load pulse. The output
voltage variation due to load regulation is labeled Πand the
thermal regulation component is labeled .
2
2
2
1
18
8.0
t, TIME (2.0 ms/DIV)
Vout = 5.0 V
Vin = 8.0 V → 18 V → 8.0 V
Iout = 2.0 A
1 = Regline = 2.4 mV
2 = Regtherm = 0.0015%VO/W
Figure 1. MC78T05AC Line and Thermal Regulation
1
2
2.0
0
t, TIME (2.0 ms/DIV)
Vout = 5.0 V
Vin = 15
Iout = 0 A → 2.0 A → 0 A
1 = Regline = 4.4 mV
2 = Regtherm = 0.0015%VO/W
Figure 2. MC78T05AC Load and Thermal Regulation
1.0k
1.0k
Q1
Q2
Q4
Q5
Q9
300
Q8
Q3 3.6k
6.4k
Q10
Q20
Q22
1.0k
3.0k
Q19
5.6k
Q16
10pF
Q23
Input
210 Q21
6.7V
16k
Q24
100
Q25
200
Q26
Q27
300
13 0.12
520
50
Q12
2.6k 8.0−15 VO
2.0k
Q6 Q7
5.0 VO
3.9k
6.0k Q17
40
pF
Q18
Q11 Q13
Q15
6.0k Q14
2.8k
200
Output
Gnd
Figure 3. Representative Schematic Diagram
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