MC14532B_14 Datasheet, PDF (6/7 Pages) ON Semiconductor – 8-Bit Priority Encoder

MC14532B
D15 D14 D13 D12 D11 D10 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
V_DD
E_in
GS
E_out
Q2 Q1 Q0
D7 D6 D5 D4 D3 D2 D1 D0
E_in
E_out
Q2 Q1 Q0
E_out = “1"
WITH D_in = “0"
3/4 MC14071B
Q3
Q2
Q1
Q0
Figure 5. Two MC14532B’s Cascaded for 4−Bit Output
V_DD
V_SS
CLOCK
INPUT
DIGITAL TO ANALOG CONVERSION
The digital eight−bit word to be converted is applied to the
inputs of the MC14512 with the most significant bit at X7
and the least significant bit at X0. A clock input of up to
2.5 MHz (at V_DD = 10 V) is applied to the MC14520B.
A compromise between I_bias for the MC1710 and DR
between N and P−channel outputs gives a value of R of
33 kW. In order to filter out the switching frequencies, RC
should be about 1.0 ms (if R = 33 kW, C [ 0.03 mF). The
analog 3.0 dB bandwidth would then be dc to 1.0 kHz.
ANALOG TO DIGITAL CONVERSION
V_DD
An analog signal is applied to the analog input of the
MC1710. A digital eight−bit word known to represent a di-
gitized level less than the analog input is applied to the
MC14512 as in the D to A conversion. The word is incre-
mented at rates sufficient to allow steady state to be reached
between incrementations (i.e. 3.0 ms). The output of the
MC1710 will change when the digital input represents the
first digitized level above the analog input. This word is the
digital representation of the analog word.
C
E
R
1/2 MC14520B
Q1 Q2 Q3 Q4
C
E
R
1/2 MC14520B
Q1 Q2 Q3 Q4
D0 D1 D2 D3 D4 D5 D6 D7
E_in
Q2 Q1 Q0
DIGITAL INPUT/OUTPUT
8-BIT WORD
TO BE CONVERTED
X7 X6 X5 X4 X3 X2 X1 X0
A
B
MC14512
C
Z
STOP
WORD
INCREMENTATION
MC1710
R
ANALOG
OUTPUT
C
ANALOG
INPUT
Figure 6. Digital to Analog and Analog to Digital Converter
http://onsemi.com
6