CS2841B Datasheet, PDF (6/10 Pages) Cherry Semiconductor Corporation – Automotive Current Mode PWM Control Circuit

CS2841B
CIRCUIT DESCRIPTION
Undervoltage Lockout
During Undervoltage Lockout (Figure 5), the output
driver is biased to a high impedance state. The output should
be shunted to ground with a resistor to prevent output
leakage current from activating the power switch.
V_CC
ON/OFF Command
to Reset of IC
V_ON = 8.0 V
V_OFF = 7.4 V
When the power supply sees a sudden large output current
increase, the control voltage will increase allowing the duty
cycle to momentarily increase. Since the duty cycle tends to
exceed the maximum allowed to prevent transformer
saturation in some power supplies, the internal oscillator
waveform provides the maximum duty cycle clamp as
programmed by the selection of OSC components.
V_REF
R_T
OSC
C_T
GND
I_CC
< 15 mA
< 1.0 mA
V_CC
7.4 V 8.0 V
Figure 5. Typical Undervoltage Characteristics
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
representing the peak output inductor current (Figure 6). An
increase in V_CC causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed−forward characteristic of current mode control, since
the control voltage does not have to change during changes
of input supply voltage.
OSC
OSC
RESET
EA Output
Switch
Current
V_CC
I_O
V_O
Figure 6. Timing Diagram for Key CS2841B
Parameters
Timing Parameters
V_upper
V_lower
t_c
Sawtooth Mode
Large R_T (≈ 10 kW)
t_d
V_OSC
Triangular Mode
Small R_T (≈ 700 kW)
Internal Clock
V_OSC
Internal Clock
Figure 7. Oscillator Timing Network and
Parameters
Setting the Oscillator
Oscillator timing capacitor, C_T, is charged by V_REF
through R_T and discharged by an internal current source.
During the discharge time, the internal clock signal blanks
out the output to the Low state, thus providing a user selected
maximum duty cycle clamp. Charge and discharge times are
determined by the general formulas:
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