CM1233_14 Datasheet, PDF (6/9 Pages) ON Semiconductor – ESD Clamp Array for High Speed Data Line Protection

CM1233
Performance Information
Graphical Comparison and Test Setup
Figure 5 shows that the CM1233 (ESD protector) lowers the peak voltage and clamping voltage by 45% across a wide range
of loading conditions in comparison to a standard ESD protection device. Figure 6 also indicates that the DUP/ASIC protected
by the CM1233 dissipates less energy than a standard ESD protection device. This data was derived using the test setups shown
in Figure 7.
V_PEAK
1.2
STD ESD Device
1.0
Energy (0−50 ns)
0.6
0.5
STD ESD Device
0.8
CM1233
0.6
0.4
0.3
CM1233
0.4
0.2
0.2
0
5
10
20
RDUP (W)
Figure 5. VPeak (8 KV IEC−61000 4−2 ESD
Contact Strike) and VClamp vs. Loading (RDUP)*
0.1
0
5
10
20
RDUP (W)
Figure 6. Energy Dissipated in DUP vs. RDUP*
*RDUP is the emulated Dynamic Resistance (load) of the Device Under Protection (DUP). See Figure 7.
IEC 61000−4−2
Test Standards
Standard
ESD Device
Standard ESD
Device Test Setup
Voltage
Probe
Device Under
Protection (DUP)
R_VARIABLE
Current
Probe
I_RESIDUAL
IEC 61000−4−2
Test Standards
CM1233
CM1233 Test Setup
Voltage
Probe
Device Under
Protection (DUP)
R_VARIABLE
Current
Probe
I_RESIDUAL
Figure 7. Test Setups: Standard Device (Left) and CM1233 (Right)
http://onsemi.com
6