AMIS-30521 Datasheet, PDF (6/28 Pages) AMI SEMICONDUCTOR – Micro-stepping Motor Driver

AMIS−30521, NCV70521
Table 5. DC PARAMETERS
(DC Parameters are Given for V_BB and Temperature in Their Operating Ranges Unless Otherwise Specified)
Convention: Currents Flowing in the Circuit are Defined as Positive
Symbol
Pin(s)
Parameter
Remark/Test Conditions Min
Typ
Max Unit
SUPPLY INPUTS
V_BB
Nominal Operating Supply Range
I_BB
V_BB Total Current Consumption
I_BBS
Sleep Current in V_BB (Note 7)
V_DD
Logic Supply Voltage
I_DDD
V_DD Dynamic Current (Note 6)
I_DDS
Sleep Current in V_DD (Note 7)
POWER ON RESET (POR)
Unloaded Outputs
Unloaded Outputs
6
30
V
8
mA
100
mA
4.75
5
5.25
V
7.5
10
mA
100
mA
V_DDH
V_DDL
V_DD
V_DDHYS
MOTOR DRIVER
Internal POR Comparator Threshold
Internal POR Comparator Threshold
Hysteresis Between V_DDH and V_DDL
V_DD Rising
V_DD Falling
3.85 4.20 4.55
V
3.85
V
0.10 0.35 0.60
V
I_MDmax,Peak
I_MDabs
I_MDrel
I_{SET_TC1}
Max Peak Current Through Motor Coil T_J = −40°C
Absolute Error on Coil Current
T_J = 125°C
Error On Current Ratio I_coilx/I_coily
Temperature Coefficient of Coil Current
Set−Level, CUR[4:0] = 0...27
T_J v 160°C
1600
−10
−7
−240
mA
10
%
7
%
ppm/K
I_{SET_TC2}
Temperature Coefficient of Coil Current
Set−Level, CUR[4:0] = 28...31
T_J v 160°C
−490
ppm/K
R_HS
R_LS3
MOTXP
MOTXN
MOTYP
MOTYN
On−Resistance High−Side Driver,
(Note 9) CUR[4:0] = 0...31
On−Resistance Low−Side Driver,
(Note 9) CUR[4:0] = 23...31
R_LS2
On−Resistance Low−Side Driver,
(Note 9) CUR[4:0] = 16...22
R_LS1
On−Resistance Low−Side Driver,
(Note 9) CUR[4:0] = 9...15
R_LS0
I_Mpd
DIGITAL INPUTS
On−Resistance Low−Side Driver,
(Note 9) CUR[4:0] = 0...8
Pulldown Current
V_BB = 12 V, T_J = 27°C
V_BB = 12 V, T_J = 160°C
V_BB = 12 V, T_J = 27°C
V_BB = 12 V, T_J = 160°C
V_BB = 12 V, T_J = 27°C
V_BB = 12 V, T_J = 160°C
V_BB = 12 V, T_J = 27°C
V_BB = 12 V, T_J = 160°C
V_BB = 12 V, T_J = 27°C
V_BB = 12 V, T_J = 160°C
HiZ Mode
0.45 0.56
W
0.94 1.25
W
0.45 0.56
W
0.94 1.25
W
0.90
1.2
W
1.9
2.5
W
1.8
2.3
W
3.8
5.0
W
3.6
4.5
W
7.5
10
W
1
mA
I_leak
Input Leakage (Note 8)
DI, CLK
V_IL
NXT, DIR Logic Low Threshold
CLR, CS
V_IH
Logic High Threshold
T_J = 160°C
0
2.20
0.5
mA
0.75
V
V_DD
V
R_{pd_CLR}
CLR Internal Pulldown Resistor
120
280
kW
R_{pd_TST}
TST0 Internal Pulldown Resistor
3
8
kW
6. Current with oscillator running, all analogue cells active, SPI communication and NXT pulses applied. No floating inputs. Guaranteed by
design.
7. Current with all analogue cells in power down. Logic is powered but no clocks running. All outputs unloaded, no inputs floating.
8. Not valid for pins with internal Pulldown resistor
9. Characterization Data Only
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