NOIV1SN5000A Datasheet, PDF (53/71 Pages) ON Semiconductor – VITA 5000 5.3 Megapixel 75 FPS Global Shutter CMOS Image Sensor

NOIV1SN5000A
Table 35. REGISTER MAP
Address
Offset
Address
Bit Field
[3:2]
[15:4]
29
189
[12:0]
Sequencer [Block Offset: 192]
0
192
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[10]
[13:11]
[14]
Register Name
gain_stage2
digital_gain
reserved
reserved
Default Default
(Hex) (Dec)
Description
0x0
0
Gain Stage 2 Status
0x000
0
AEC Digital Gain Status
5.7 unsigned
0x0000
0
0x000
0
Reserved
general_configuration
enable
0x00
0x0
rolling_shutter_enable 0x0
zero_rot_enable
0x0
x_lag
0x0
triggered_mode
0x0
slave_mode
0x0
nzrot_xsm_delay_en-
0x0
able
subsampling
0x0
binning
0x0
roi_aec_enable
0x0
monitor_select
0x0
pls_mode
0x0
0
0
Enable sequencer
‘0’ = Idle,
‘1’ = enabled
0
Operation Selection
‘0’ = global shutter,
‘1’ = rolling shutter
0
Zero ROT mode Selection
‘0’ = Normal ROT,
‘1’ = Zero ROT
0
x−lag in Zero ROT mode
‘0’ = No lag,
‘1’ = Lag
0
Triggered Mode Selection (Snap-
shot Shutter only)
‘0’ = Normal Mode,
‘1’ = Triggered Mode
0
Master/slave selection (global
shutter only)
‘0’ = master,
‘1’ = slave
0
Insert delay between end of ROT
and start of readout in normal
ROT readout mode if ‘1’.
ROT delay is defined by register
xsm_delay
0
Subsampling mode selection
‘0’ = no subsampling,
‘1’ = subsampling
0
Binning mode selection
‘0’ = no binning,
‘1’ = binning
0
Enable windowing for AEC statist-
ics.
‘0’ = Subsample all windows
‘1’ = Subsample configured win-
dow
0
Control of the monitor pins
0
Test mode for PLS measurements
Type
RO
RW
1
193
delay_configuration
0x0000
0
RW
[7:0]
rs_x_length
0x00
0
X-Readout duration in rolling shut-
ter mode (extends lines with
dummy pixels).
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