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MC74VHC595 Datasheet, PDF (5/12 Pages) Motorola, Inc – 8-Bit Shift Register with Output Storage Register
MC74VHC595
FUNCTION TABLE
Inputs
Resulting Function
Operation
Reset
(SCLR)
Clear shift register
L
Shift data into shift
H
register
Registers remains
H
unchanged
Transfer shift register
H
contents to storage
register
Storage register remains
X
unchanged
Serial
Input
(SI)
X
D
X
X
X
Shift
Clock
(SCK)
X
↑
L, H, ↓
L, H, ↓
X
Reg
Clock
(RCK)
L, H, ↓
L, H, ↓
X
Output
Enable
(OE)
L
L
L
Shift
Register
Contents
L
D→SRA;
SRN→SRN+1
U
Storage
Register
Contents
U
U
**
Serial
Output
(SQH)
Parallel
Outputs
(QA -- QH)
L
U
SRG→SRH
U
U
**
↑
L
U
SRN→STRN
*
SRN
L, H, ↓
L
*
U
*
U
Enable parallel outputs
X
X
X
X
L
*
**
*
Enabled
Force outputs into high
X
X
X
X
H
*
impedance state
SR = shift register contents
D = data (L, H) logic level
inputs
STR = storage register contents U = remains unchanged
↓ = High--to--Low
↑ = Low--to--High
**
*
Z
* = depends on Reset and Shift Clock
** = depends on Register Clock input
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC DC Supply Voltage
– 0.5 to + 7.0
V
Vin DC Input Voltage
– 0.5 to + 7.0
V
Vout DC Output Voltage
– 0.5 to VCC + 0.5 V
IIK Input Diode Current
-- 20
mA
IOK Output Diode Current
± 20
mA
Iout DC Output Current, per Pin
± 25
mA
ICC DC Supply Current, VCC and GND Pins
± 50
mA
PD Power Dissipation in Still Air,
SOIC Packages†
500
mW
TSSOP Package†
450
Tstg Storage Temperature
– 65 to + 150
_C
* Absolute maximum continuous ratings are those values beyond which damage to the device
may occur. Exposure to these conditions or conditions beyond those indicated may
adversely affect device reliability. Functional operation under absolute--maximum--rated
conditions is not implied.
†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: -- 6.1 mW/_C from 65_ to 125_C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high--impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND ≤ (Vin or Vout) ≤ VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Max Unit
VCC DC Supply Voltage
2.0 5.5 V
Vin
DC Input Voltage
0
5.5 V
Vout DC Output Voltage
0
VCC
V
TA
Operating Temperature, All Package Types
-- 55 + 125 _C
tr, tf
Input Rise and Fall Time
VCC = 3.3V ±0.3V 0
VCC =5.0V ±0.5V 0
100 ns/V
20
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