MC74VHC573_11 Datasheet, PDF (5/9 Pages) ON Semiconductor – Octal D-Type Latch with 3-State Output

TIMING REQUIREMENTS (Input t_r = t_f = 3.0ns)
MC74VHC573
Symbol
t_w(h)
Parameter
Minimum Pulse Width, LE
t_su
Minimum Setup Time, D to LE
t_h
Minimum Hold Time, D to LE
Test Conditions
V_CC = 3.3 ± 0.3V
V_CC = 5.0 ±0.5V
V_CC = 3.3 ± 0.3V
V_CC = 5.0 ± 0.5V
V_CC = 3.3 ± 0.3V
V_CC = 5.0 ± 0.5V
T_A = 25°C
Typ
Limit
5.0
5.0
3.5
3.5
1.5
1.5
T_A = − 40
to 85°C
Limit
Unit
5.0
ns
5.0
3.5
ns
3.5
1.5
ns
1.5
SWITCHING WAVEFORMS
D
50%
t_PLH
Q
50% VCC
Figure 1.
V_CC
GND
t_PHL
t_w
V_CC
LE
50%
GND
t_PLH
t_PHL
Q
50% VCC
Figure 2.
OE
Q
Q
50%
t_PZL t_PLZ
50% VCC
t_PZH t_PHZ
50% VCC
Figure 3.
V_CC
GND
HIGH
IMPEDANCE
VOL +0.3V
VOL -0.3V
HIGH
IMPEDANCE
VALID
V_CC
D
50%
GND
t_su
t_h
LE
V_CC
50%
GND
Figure 4.
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