LC75810T-8725-E Datasheet, PDF (5/54 Pages) ON Semiconductor – 1/8 to 1/10 Duty Dot Matrix LCD Display Controllers/Drivers

LC75810E/T
Electrical Characteristics for the Allowable Operating Ranges
Parameter
Symbol
Conditions
Ratings
Unit
min.
typ.
max.
Hysteresis
Input high level current
Input low level current
Output high level voltage
V_H
I_IH
I_IL
V_OH1
CE, CL, DI, RES
CE, CL, DI, RES: V_I = 6.0 V
CE, CL, DI, RES: V_I = 0 V
S1 to S80: I_O = −20 μA
V_OH2 COM1 to COM10: I_O = −100 μA
0.1V_DD
−5.0
V_LCD
0−0.6
V_LCD
0−0.6
V
5.0
μA
μA
V
Output low level voltage
V_OL1
V_OL2
V_MID1
S1 to S80: I_O = 20 μA
COM1 to COM10: I_O = 100 μA
S1 to S80: I_O = ±20 μA
2/4 V_LCD0
−0.6
0.6
V
0.6
2/4 V_LCD0
+0.6
Output middle level voltage ∗1 V_MID2 COM1 to COM10: I_O = ±100 μA
3/4 V_LCD0
−0.6
3/4 V_LCD0
V
+0.6
V_MID3 COM1 to COM10: I_O = ±100 μA
1/4 V_LCD0
−0.6
1/4 V_LCD0
+0.6
Oscillator frequency
Current drain
fosc
I_DD1
I_DD2
I_LCD1
I_LCD2
OSC: ^{ROSC = 10 kΩ}
C_OSC = 470 pF
V_DD: Power saving mode
V_DD = 6.0 V
V_DD: Output open
f_OSC = 300 kHz
V_LCD: Power saving mode
V_LCD = 10.0 V
Output open
V_LCD: _{fOSC = 300 kHz}
When the display contrast adjustment circuit is used
210
300
390 kHz
5
700
1400
5
450
900
μA
I_LCD3
V_LCD:
V_LCD = 10.0 V
Output open
f_OSC = 300 kHz
When the display contrast adjustment circuit is not
used
200
400
Note ∗1: Excluding the bias voltage generation divider resistors built into the V_LCD0, V_LCD1, V_LCD2, V_LCD3, and V_SS pins. (See figure 1.)
V_LCD
V_LCD0
V_LCD1
V_LCD2
V_LCD3
V_SS
CONTRAST
ADJUSTER
To the common and segment drivers
Excluding these resistors
Figure 1
No.7141-5/54