GA3227 Datasheet, PDF (5/13 Pages) ON Semiconductor – Pre-configured DSP System

CONSOLIDATOR GA3227
Table 3. ELECTRICAL CHARACTERISTICS − PART 2
Parameter
Min
Max
Units
Accuracy
WIDEBAND SYSTEM GAIN
Wideband System Gain
−36
12
dB
Type 3
Wideband Attack Time Constant (Fast & Slow)
0.25
8192
ms
Type 1, 3
Wideband Release Time Constant (Fast & Slow)
0.25
8192
ms
Type 1, 3
External VC
−48
0
dB
Type 3
Internal VC Attenuator
−48
0
dB
Type 3
TOTAL SYSTEM GAIN
Total System Gain
−19
83
dB
(Note 1)
AGCo
AGCo Output Limiting
−30
−1
dBFS*
Type 3
AGCo Compression Ratio
∞:1
∞:1
Ratio
N/A
PEAK CLIPPER
PC Output Limiting
−40
0
dBFS
Type 3
TONE GENERATOR
Pure Tone Frequency
(memory and low battery indicator)
0.25
12
kHz
Type 1, 2
Pure Tone Amplitude
(memory and low battery indicator)
−50
0
dBFS
Type 3
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Total System Gain consists of: Wideband System Gain + High and Low Independent Channel Gains + Converter Gain and accuracy of this
parameter is dependent on accuracy of the components.
*Peak output is defined as largest sine wave possible at the resonant frequency of the receiver.
NOTE: Type 1: Accuracy is determined by the clock frequency deviation
Type 2: Accuracy is determined by the quantization error of 16 bit coefficient and 20 bit or higher data word
Type 3: Accuracy is determined by the quantization error of a parameter word (see Table 2 for word length) and 20 bit or higher data
word
TYPICAL APPLICATIONS
V_B
VREG2 19
VREG 18
3k9
IN
20
1
1k T
REGULATOR
A/D
MGND 2
GA3227
MS2 MS
12
11
SDA
10
PROGRAMMING
INTERFACE
EEPROM
TWIN DETECTOR
T−coil EQ
1st to 3rd
ORDER
LC
HP
COMPRESSOR
S
24 db/oct
BAND SPLIT
FILTER
TWIN DETECTOR
SQUELCH
COMPRESSOR
LP
TWIN DETECTOR
SQUELCH
1st or 2nd
ORDER
HC
Bi−Quadratic
Filter
TRIMMER INTERFACE
15 14 13
3
4
VC TR1 TR2 TR3 TR4
5
TONE
GENERATOR
AGC−O
TWIN DETECTOR
VC GAIN
7
PEAK
CLIPPING
D/A
8
HBRIDGE
9
6
16
17
Note: All resistors in ohms and all capacitors in farads, unless otherwise stated.
Figure 2. Test Circuit
OUT
LP FILTER
www.onsemi.com
5