CAT853TTBI-T3 Datasheet, PDF (5/9 Pages) ON Semiconductor – 3-Pin Microprocessor Power Supply Supervisors

CAT853, CAT859, CAT863, CAT869
DETAILED DESCRIPTION
Reset Timing
The reset signal is asserted low for the CAT853, CAT863, CAT859, and CAT869 when the power supply voltage falls below
the threshold trip voltage and remains asserted for at least 140 ms after the power supply voltage has risen above the threshold.
Power _{5 V}
Supply
Voltage 0 V
Threshold
Voltage
Reset Timeout Period
5V
RESET
0V
140 ms
minimum
Figure 6. Reset Timing Diagram
V_CC Transient Response
The CAT853, CAT863, CAT859, and CAT869 protect mPs
against brownout failure. Short duration transients of 4 ms or
less and 100 mV amplitude typically do not cause a false
RESET.
Figure 7 shows the maximum pulse duration of
negative−going V_CC transients that do not cause a reset
condition. As the amplitude of the transient goes further
below the threshold (increasing V_TH − V_CC), the maximum
pulse duration decreases. In this test, the V_CC starts from an
initial voltage of 0.5 V above the threshold and drops below
it by the amplitude of the overdrive voltage (V_TH − V_CC).
30
T_AMB = 25°C
25
20
“C” THRESHOLD
15
Valid Reset with V_CC under 1.0 V
To ensure that the CAT859 and CAT869 RESET pin is in
a known state when V_CC is under 1.0 V, a > 10 kW
pull−down resistor between RESET pin and GND is
recommended.
Power
Supply
V_CC
CAT8x9
RESET
GND
10 kW
10
“M” THRESHOLD
5
0
1
10
100
1000
RESET OVERDRIVE V_TH − V_CC (mV)
Figure 7. Maximum Transient Duration Without
Causing a Reset Pulse vs. Reset Comparator
Overdrive
Figure 8. RESET Valid with V_CC Under 1.0 V
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