CAT5259 Datasheet, PDF(5/16 Page) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP) with 256 Taps and 2-wire Interface

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CAT5259 Datasheet, PDF (5/16 Pages) Catalyst Semiconductor – Quad Digitally Programmable Potentiometers (DPP) with 256 Taps and 2-wire Interface

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POWER UP TIMING(1)(2)

Symbol Parameter

tPUR Power-up to Read Operation

tPUW Power-up to Write Operation

WIPER TIMING

Symbol Parameter

tWRPO

tWRL

Wiper Response Time After Power Supply Stable

Wiper Response Time After Instruction Issued

WRITE CYCLE LIMITS (3)

Symbol Parameter

tWR

Write Cycle Time

RELIABILITY CHARACTERISTICS

Symbol

NEND(4)

TDR(4)

VZAP(4)

ILTH(4)

Parameter

Endurance

Data Retention

ESD Susceptibility

Latch-Up

Reference Test Method

MIL-STD-883, Test Method 1033

MIL-STD-883, Test Method 1008

MIL-STD-883, Test Method 3015

JEDEC Standard 17

CAT5259

Max Units

Min

Max Units

Âµs

Max Units

Min Max

1,000,000

100

2000

100

Units

Cycles/Byte

Years

Figure 1. Bus Timing

tHIGH

tLOW

SCL

tSU:STA

tHD:DAT

tHD:STA

tSU:DAT

SDA IN

SDA OUT

tAA

tDH

tSU:STO

tBUF

Notes:

(1) This parameter is tested initially and after a design or process change that affects the parameter.

(2) tPUR and tPUW are delays required from the time VCC is stable until the specified operation can be initiated.

(3) The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write

cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.

(4) This parameter is tested initially and after a design or process change that affects the parameter.

Characteristics subject to change without notice

Doc. No. MD-2000 Rev. J

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